]> git.sur5r.net Git - u-boot/commitdiff
arm: mvebu: switch clearfog to use device-tree i2c and gpio
authorJon Nettleton <jon@solid-run.com>
Mon, 28 May 2018 16:10:30 +0000 (19:10 +0300)
committerStefan Roese <sr@denx.de>
Tue, 5 Jun 2018 05:29:09 +0000 (07:29 +0200)
This switches the clearfog boards to use DM based gpio and i2c
drivers.  The io expanders are configured via their device-tree
entries.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: add DT i2c aliases]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
arch/arm/dts/armada-388-clearfog.dts
board/solidrun/clearfog/clearfog.c
configs/clearfog_defconfig
include/configs/clearfog.h

index bc52bc0167d34586799790d8ecb7279fb2fe1cef..a0b566a5ae0e51f8031b70dd3886285ff3b2c49d 100644 (file)
@@ -62,6 +62,8 @@
                ethernet2 = &eth1;
                ethernet3 = &eth2;
                spi1 = &spi1;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
        };
 
        chosen {
index ede303d4ebf96aaa4ac5946d40d1916876b1d506..4e1386c8a22367c9886b44dd82d92e7cee6e128f 100644 (file)
@@ -32,22 +32,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define BOARD_GPP_POL_LOW      0x0
 #define BOARD_GPP_POL_MID      0x0
 
-/* IO expander on Marvell GP board includes e.g. fan enabling */
-struct marvell_io_exp {
-       u8 chip;
-       u8 addr;
-       u8 val;
-};
-
-static struct marvell_io_exp io_exp[] = {
-       { 0x20, 2, 0x40 },      /* Deassert both mini pcie reset signals */
-       { 0x20, 6, 0xf9 },
-       { 0x20, 2, 0x46 },      /* rst signals and ena USB3 current limiter */
-       { 0x20, 6, 0xb9 },
-       { 0x20, 3, 0x00 },      /* Set SFP_TX_DIS to zero */
-       { 0x20, 7, 0xbf },      /* Drive SFP_TX_DIS to zero */
-};
-
 static struct serdes_map board_serdes_map[] = {
        {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
        {SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0},
@@ -126,8 +110,6 @@ int board_early_init_f(void)
 
 int board_init(void)
 {
-       int i;
-
        /* Address of boot parameters */
        gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
@@ -142,10 +124,6 @@ int board_init(void)
        setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
        mdelay(10);
 
-       /* Init I2C IO expanders */
-       for (i = 0; i < ARRAY_SIZE(io_exp); i++)
-               i2c_write(io_exp[i].chip, io_exp[i].addr, 1, &io_exp[i].val, 1);
-
        return 0;
 }
 
index e471c876faa0b75258b32dd4260d1d29cf04f778..7a9ee510171b0ac53b283b3aec0feaccc89b727c 100644 (file)
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MVEBU=y
 CONFIG_SYS_TEXT_BASE=0x00800000
+CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -21,6 +22,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x141
 CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
@@ -36,6 +38,10 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_SCSI_AHCI=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_MV=y
index ed6f000db16b9637e70ec578d440f3cdfa140871..1141aee08b6e43a028929d734dd671e8e98288c9 100644 (file)
  * Commands configuration
  */
 
-/* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MVTWSI
-#define CONFIG_I2C_MVTWSI_BASE0                MVEBU_TWSI_BASE
-#define CONFIG_SYS_I2C_SLAVE           0x0
-#define CONFIG_SYS_I2C_SPEED           100000
-
 /* SPI NOR flash default params, used by sf commands */
 #define CONFIG_SF_DEFAULT_BUS          1