#ifndef __ARCH_ARM_MACH_MX6_CCM_REGS_H__
 #define __ARCH_ARM_MACH_MX6_CCM_REGS_H__
 
+#define CCM_CCGR0              0x020C4068
+#define CCM_CCGR1              0x020C406c
+#define CCM_CCGR2              0x020C4070
+#define CCM_CCGR3              0x020C4074
+#define CCM_CCGR4              0x020C4078
+#define CCM_CCGR5              0x020C407c
+#define CCM_CCGR6              0x020C4080
+
+#define PMU_MISC2              0x020C8170
+
+#ifndef __ASSEMBLY__
 struct mxc_ccm_reg {
        u32 ccr;        /* 0x0000 */
        u32 ccdr;
        u32 analog_pfd_528_clr;
        u32 analog_pfd_528_tog;
 };
+#endif
 
 /* Define the bits in register CCR */
 #define MXC_CCM_CCR_RBC_EN                             (1 << 27)