]> git.sur5r.net Git - u-boot/commitdiff
armv8: zynqmp: Map PCIe High as device memory
authorAnders Hedlund <anders.j.hedlund@gmail.com>
Tue, 19 Dec 2017 16:24:41 +0000 (17:24 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 30 Jan 2018 13:28:40 +0000 (14:28 +0100)
Set the 8GB PCIe High area as device memory.
Also extend the DDR High area to cover the full 32GB range.

Signed-off-by: Anders Hedlund <anders.j.hedlund@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/cpu/armv8/zynqmp/cpu.c

index f026cb4511f02f738cc28561ac38b0fc16ff554c..4596d6bff479458ed8231c218771d3e16afee5ae 100644 (file)
@@ -48,20 +48,20 @@ static struct mm_region zynqmp_mem_map[] = {
 #endif
                .virt = 0x400000000UL,
                .phys = 0x400000000UL,
-               .size = 0x200000000UL,
+               .size = 0x400000000UL,
                .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
                         PTE_BLOCK_NON_SHARE |
                         PTE_BLOCK_PXN | PTE_BLOCK_UXN
        }, {
-               .virt = 0x600000000UL,
-               .phys = 0x600000000UL,
+               .virt = 0x800000000UL,
+               .phys = 0x800000000UL,
                .size = 0x800000000UL,
                .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
                         PTE_BLOCK_INNER_SHARE
        }, {
-               .virt = 0xe00000000UL,
-               .phys = 0xe00000000UL,
-               .size = 0xf200000000UL,
+               .virt = 0x1000000000UL,
+               .phys = 0x1000000000UL,
+               .size = 0xf000000000UL,
                .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
                         PTE_BLOCK_NON_SHARE |
                         PTE_BLOCK_PXN | PTE_BLOCK_UXN