]> git.sur5r.net Git - u-boot/commitdiff
arm64: a8k: dts: Add support for NAND devices on A8K platform
authorKonstantin Porotchkin <kostap@marvell.com>
Wed, 5 Apr 2017 15:22:32 +0000 (18:22 +0300)
committerStefan Roese <sr@denx.de>
Tue, 9 May 2017 11:38:18 +0000 (13:38 +0200)
Add NAND to CP master device tree. Add armada-7040-db-nand
device tree for the board configured with NAND boot device.
Add comment about boot device ID to armada-7040-db DTS.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
arch/arm/dts/Makefile
arch/arm/dts/armada-7040-db-nand.dts [new file with mode: 0644]
arch/arm/dts/armada-7040-db.dts
arch/arm/dts/armada-cp110-master.dtsi

index 4d656ce4cc3db87cbb57176a2ddb4d5955106607..4528a8ff42904833e544b4e8d3eb73286991f33d 100644 (file)
@@ -81,6 +81,7 @@ dtb-$(CONFIG_ARCH_MVEBU) +=                   \
        armada-388-gp.dtb                       \
        armada-385-amc.dtb                      \
        armada-7040-db.dtb                      \
+       armada-7040-db-nand.dtb                 \
        armada-8040-db.dtb                      \
        armada-8040-mcbin.dtb                   \
        armada-xp-gp.dtb                        \
diff --git a/arch/arm/dts/armada-7040-db-nand.dts b/arch/arm/dts/armada-7040-db-nand.dts
new file mode 100644 (file)
index 0000000..3a9df21
--- /dev/null
@@ -0,0 +1,223 @@
+/*
+ * Copyright (C) 2017 Marvell Technology Group Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Device Tree file for Marvell Armada 7040 Development board platform
+ * Boot device: NAND, 0xE (SW3)
+ */
+
+#include "armada-7040.dtsi"
+
+/ {
+       model = "Marvell Armada 7040 DB board with NAND";
+       compatible = "marvell,armada7040-db-nand", "marvell,armada7040-db",
+                    "marvell,armada7040", "marvell,armada-ap806-quad",
+                    "marvell,armada-ap806";
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       aliases {
+               i2c0 = &cpm_i2c0;
+               spi0 = &cpm_spi1;
+       };
+
+       memory@00000000 {
+               device_type = "memory";
+               reg = <0x0 0x0 0x0 0x80000000>;
+       };
+};
+
+&ap_pinctl {
+          /* MPP Bus:
+           * SDIO  [0-5]
+           * UART0 [11,19]
+           */
+                 /* 0   1   2   3   4   5   6   7   8   9 */
+       pin-func = < 0x1 0x1 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0
+                    0x0 0x3 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x3 >;
+};
+
+&uart0 {
+       status = "okay";
+};
+
+
+&cpm_pcie2 {
+       status = "okay";
+};
+
+&cpm_i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&cpm_i2c0_pins>;
+       status = "okay";
+       clock-frequency = <100000>;
+};
+
+&cpm_pinctl {
+               /* MPP Bus:
+                * AUDIO   [0-5]
+                 * GBE     [6-11]
+                * SS_PWDN [12]
+                * NF_RBn  [13]
+                 * GPIO    [14]
+                * DEV_BUS [15-27]
+                * SATA1   [28]
+                * UART0   [29-30]
+                * MSS_VTT_EN [31]
+                * SMI     [32,34]
+                * XSMI    [35-36]
+                * I2C     [37-38]
+                * RGMII1  [44-55]
+                * SD      [56-61]
+                * GPIO    [62]
+                */
+                /*   0   1   2   3   4   5   6   7   8   9 */
+        pin-func = < 0x2 0x2 0x2 0x2 0x2 0x2 0x3 0x3 0x3 0x3
+                     0x3 0x3 0x0 0x2 0x0 0x1 0x1 0x1 0x1 0x1
+                     0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x9 0xa
+                     0xa 0x0 0x7 0x0 0x7 0x7 0x7 0x2 0x2 0x0
+                     0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x1
+                     0x1 0x1 0x1 0x1 0x1 0x1 0xe 0xe 0xe 0xe
+                     0xe 0xe 0x0>;
+};
+
+&cpm_spi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&cpm_spi0_pins>;
+       status = "disabled";
+
+       spi-flash@0 {
+               #address-cells = <0x1>;
+               #size-cells = <0x1>;
+               compatible = "jedec,spi-nor";
+               reg = <0x0>;
+               spi-max-frequency = <20000000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "U-Boot";
+                               reg = <0x0 0x200000>;
+                       };
+
+                       partition@400000 {
+                               label = "Filesystem";
+                               reg = <0x200000 0xe00000>;
+                       };
+               };
+       };
+};
+
+&cpm_sata0 {
+       status = "okay";
+};
+
+&cpm_usb3_0 {
+       status = "okay";
+};
+
+&cpm_usb3_1 {
+       status = "okay";
+};
+
+&cpm_comphy {
+       phy0 {
+               phy-type = <PHY_TYPE_SGMII2>;
+               phy-speed = <PHY_SPEED_3_125G>;
+       };
+
+       phy1 {
+               phy-type = <PHY_TYPE_USB3_HOST0>;
+               phy-speed = <PHY_SPEED_5G>;
+       };
+
+       phy2 {
+               phy-type = <PHY_TYPE_SGMII0>;
+               phy-speed = <PHY_SPEED_1_25G>;
+       };
+
+       phy3 {
+               phy-type = <PHY_TYPE_SATA1>;
+               phy-speed = <PHY_SPEED_5G>;
+       };
+
+       phy4 {
+               phy-type = <PHY_TYPE_USB3_HOST1>;
+               phy-speed = <PHY_SPEED_5G>;
+       };
+
+       phy5 {
+               phy-type = <PHY_TYPE_PEX2>;
+               phy-speed = <PHY_SPEED_5G>;
+       };
+};
+
+&cpm_nand {
+       status = "okay";
+};
+
+&cpm_utmi0 {
+       status = "okay";
+};
+
+&cpm_utmi1 {
+       status = "okay";
+};
+
+&ap_sdhci0 {
+       status = "okay";
+       bus-width = <4>;
+       no-1-8-v;
+       non-removable;
+};
+
+&cpm_sdhci0 {
+       status = "okay";
+       bus-width = <4>;
+       no-1-8-v;
+       non-removable;
+};
index 84e0dbdc3d703079ba53568b8c03daa7d3008d15..c1a0f468d7a3969fed494515aac35fdfc3df7d09 100644 (file)
@@ -42,6 +42,7 @@
 
 /*
  * Device Tree file for Marvell Armada 7040 Development board platform
+ * Boot device: SPI NOR, 0x32 (SW3)
  */
 
 #include "armada-7040.dtsi"
index 229046fba77425486b8ba214ee4689e519e2d620..56c1a1232cc6d0503c35b5aafcfdd25fee7d0045 100644 (file)
                                dma-coherent;
                                status = "disabled";
                        };
+
+                       cpm_nand: nand@720000 {
+                               compatible = "marvell,mvebu-pxa3xx-nand";
+                               reg = <0x720000 0x100>;
+                               #address-cells = <1>;
+
+                               clocks = <&cpm_syscon0 1 2>;
+                               nand-enable-arbiter;
+                               num-cs = <1>;
+                               nand-ecc-strength = <4>;
+                               nand-ecc-step-size = <512>;
+                               status = "disabled";
+                       };
+
                };
 
                cpm_pcie0: pcie@f2600000 {