powerpc/mpc8xxx: Add 16-bit support for DDR3

Add support for 16-bit DDR bus. Also deal with system using 64- and 32-bit
DDR devices.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
index c8fa123539d7dffe50eb09959a2cde00cf23d6a7..62a73ddf4c38df697480fdd07d5c22999c78af6b 100644 (file)
--- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
@@ -174,7 +174,19 @@ int step_assign_addresses(fsl_ddr_info_t *pinfo,
                switch (pinfo->memctl_opts[i].data_bus_width) {
                case 2:
                        /* 16-bit */
-                       printf("can't handle 16-bit mode yet\n");
+                       for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
+                               unsigned int dw;
+                               if (!pinfo->dimm_params[i][j].n_ranks)
+                                       continue;
+                               dw = pinfo->dimm_params[i][j].primary_sdram_width;
+                               if ((dw == 72 || dw == 64)) {
+                                       dbw_cap_adj[i] = 2;
+                                       break;
+                               } else if ((dw == 40 || dw == 32)) {
+                                       dbw_cap_adj[i] = 1;
+                                       break;
+                               }
+                       }
                        break;
 
                case 1:

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/options.c b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
index 80c7046478ef2ab6df4a1d233e301235faf3fdc1..02efe58b70364104e57fc34540413fc09a18c81a 100644 (file)
--- a/arch/powerpc/cpu/mpc8xxx/ddr/options.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
@@ -438,7 +438,8 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
        popts->OTF_burst_chop_en = 0;   /* on-the-fly burst chop disable */
        popts->burst_length = DDR_BL8;  /* Fixed 8-beat burst len */
 #else
-       if (popts->data_bus_width == 1) {       /* 32-bit bus */
+       if ((popts->data_bus_width == 1) || (popts->data_bus_width == 2)) {
+               /* 32-bit or 16-bit bus */
                popts->OTF_burst_chop_en = 0;
                popts->burst_length = DDR_BL8;
        } else {

diff --git a/arch/powerpc/include/asm/fsl_ddr_sdram.h b/arch/powerpc/include/asm/fsl_ddr_sdram.h
index 127a84039c337556c90cff6d55defa8b4eef89ab..1778cc56b6019a26ecbcee1d5d17ab3b8b056ff4 100644 (file)
--- a/arch/powerpc/include/asm/fsl_ddr_sdram.h
+++ b/arch/powerpc/include/asm/fsl_ddr_sdram.h
@@ -181,6 +181,9 @@ typedef struct memctl_options_partial_s {
        unsigned int all_DIMMs_minimum_tRCD_ps;
 } memctl_options_partial_t;
 
+#define DDR_DATA_BUS_WIDTH_64 0
+#define DDR_DATA_BUS_WIDTH_32 1
+#define DDR_DATA_BUS_WIDTH_16 2
 /*
  * Generalized parameters for memory controller configuration,
  * might be a little specific to the FSL memory controller