bool
select LEON
+config SYS_SPARC_NWINDOWS
+ int "Number of SPARC register windows"
+ range 2 32
+ default "8"
+ help
+ Specify the number of SPARC register windows implemented by this
+ processor. A SPARC implementation can have from 2 to 32 windows.
+ If unsure, choose 8.
+
choice
prompt "Board select"
optional
#define CONFIG_AMBAPP_IOAREA AMBA_DEFAULT_IOAREA
#endif
+/* Default number of SPARC register windows */
+#ifndef CONFIG_SYS_SPARC_NWINDOWS
+#define CONFIG_SYS_SPARC_NWINDOWS 8
+#endif
+
/* Entry for traps which jump to a programmer-specified trap handler. */
#define TRAPR(H) \
wr %g0, 0xfe0, %psr; \
/* CPU / AMBA BUS configuration */
#define CONFIG_SYS_CLK_FREQ 20000000 /* 20MHz */
-/* Number of SPARC register windows */
-#define CONFIG_SYS_SPARC_NWINDOWS 8
-
/*
* Serial console configuration
*/
/* CPU / AMBA BUS configuration */
#define CONFIG_SYS_CLK_FREQ 96000000 /* 96MHz */
-/* Number of SPARC register windows */
-#define CONFIG_SYS_SPARC_NWINDOWS 8
-
/* Define this is the GR-2S60-MEZZ mezzanine is available and you
* want to use the USB and GRETH functionality of the board
*/
/* CPU / AMBA BUS configuration */
#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
-/* Number of SPARC register windows */
-#define CONFIG_SYS_SPARC_NWINDOWS 8
-
/*
* Serial console configuration
*/
/* CPU / AMBA BUS configuration */
#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
-/* Number of SPARC register windows */
-#define CONFIG_SYS_SPARC_NWINDOWS 8
-
/*
* Serial console configuration
*/
/* CPU / AMBA BUS configuration */
#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
-/* Number of SPARC register windows */
-#define CONFIG_SYS_SPARC_NWINDOWS 8
-
/*
* Serial console configuration
*/