Exynos: clock: add CLK_DIV_FSYS3 at set_mmc_clk

Mobile storage is used the CLK_DIV_FSYS3 value.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
index 031af09c18ae3f9699a1b8c223098fb9f7c2acd4..956427c9ebbfe9dd9a9ed8b763ecd25c7f75482e 100644 (file)
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -591,9 +591,14 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div)
         * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
         * CLK_DIV_FSYS2
         * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
+        * CLK_DIV_FSYS3
+        * MMC4_PRE_RATIO [15:8]
         */
        if (dev_index < 2) {
                addr = (unsigned int)&clk->div_fsys1;
+       }  else if (dev_index == 4) {
+               addr = (unsigned int)&clk->div_fsys3;
+               dev_index -= 4;
        } else {
                addr = (unsigned int)&clk->div_fsys2;
                dev_index -= 2;