- CFG_RX_ETH_BUFFER added.

diff --git a/README b/README
index ce27ff1312466d161990eaf380f9b86efa3a45d3..f660f46aac35da30b521111e8c44daf535ba8cbb 100644 (file)
--- a/README
+++ b/README
@@ -690,7 +690,7 @@ The following options need to be configured:
 - NETWORK Support (PCI):
                CONFIG_E1000
                Support for Intel 8254x gigabit chips.
-               
+
                CONFIG_EEPRO100
                Support for Intel 82557/82559/82559ER chips.
                Optional CONFIG_EEPRO100_SROM_WRITE enables eeprom
@@ -1442,6 +1442,14 @@ Configuration Settings:
                Define if the flash driver uses extra elements in the
                common flash structure for storing flash geometry
 
+- CFG_RX_ETH_BUFFER:
+               Defines the number of ethernet receive buffers. On some
+               ethernet controllers it is recommended to set this value
+               to 8 or even higher (EEPRO100 or 405 EMAC), since all
+               buffers can be full shortly after enabling the interface
+               on high ethernet traffic.
+               Defaults to 4 if not defined.
+
 The following definitions that deal with the placement and management
 of environment data (variable area); in general, we support the
 following configurations:

diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h
index 5468fe2bd34583ec2ff75854f03a20350891e2fb..3a630d8028a251c8a7c650dbdfa2540350d1898b 100644 (file)
--- a/include/configs/ASH405.h
+++ b/include/configs/ASH405.h
@@ -125,6 +125,10 @@
 
 #define CONFIG_ZERO_BOOTDELAY_CHECK    /* check for keypress on bootdelay==0 */
 
+#define CONFIG_VERSION_VARIABLE        1       /* include version env variable */
+
+#define CFG_RX_ETH_BUFFER      16      /* use 16 rx buffer on 405 emac */
+
 /*-----------------------------------------------------------------------
  * NAND-FLASH stuff
  *-----------------------------------------------------------------------

diff --git a/include/configs/CPC45.h b/include/configs/CPC45.h
index ed843d40a4713bff2f3ce0fb244410e692a2c96f..66f978ebc2b848f3a21eade3a8f10bbae4fe4520 100644 (file)
--- a/include/configs/CPC45.h
+++ b/include/configs/CPC45.h
@@ -144,7 +144,7 @@
 /*
  * NS16550 Configuration
  */
-#define CFG_NS16550            
+#define CFG_NS16550
 #define CFG_NS16550_SERIAL
 
 #define CFG_NS16550_REG_SIZE   1
@@ -171,7 +171,7 @@
  * Memory configuration using SPD information stored on the SODIMMs
  * not yet supported.
  */
- 
+
 #define        CFG_SDRAM_SIZE    64            /* SDRAM size -- 64 or 128 MB supported */
 
        /* Bit-field values for MCCR1.
@@ -186,7 +186,7 @@
 #else
 #  error "SDRAM size not supported"
 #endif
-#define CFG_BANK1_ROW  0       
+#define CFG_BANK1_ROW  0
 #define CFG_BANK2_ROW  0
 #define CFG_BANK3_ROW  0
 #define CFG_BANK4_ROW  0
@@ -361,7 +361,7 @@
 /* IRQ_ENA_2 bit definitions */
 #define        I_ENA_2_IEAB    0x80            /* ABORT IRQ enable             */
 #define        I_ENA_2_IEK1    0x40            /* KEY1 IRQ enable              */
-#define        I_ENA_2_IEK2    0x20            /* KEY2 IRQ enable              */ 
+#define        I_ENA_2_IEK2    0x20            /* KEY2 IRQ enable              */
 #define        I_ENA_2_IERT    0x10            /* RTC IRQ enable               */
 #define        I_ENA_2_IESM    0x08            /* LM81 IRQ enable              */
 #define        I_ENA_2_IEDG    0x04            /* DEGENERATING IRQ enable      */
@@ -371,9 +371,9 @@
 /* IRQ_STAT_2 bit definitions */
 #define        I_STAT_2_ABO    0x80            /* ABORT IRQ status             */
 #define        I_STAT_2_KY1    0x40            /* KEY1 IRQ status              */
-#define        I_STAT_2_KY2    0x20            /* KEY2 IRQ status              */ 
+#define        I_STAT_2_KY2    0x20            /* KEY2 IRQ status              */
 #define        I_STAT_2_RTC    0x10            /* RTC IRQ status               */
-#define        I_STAT_2_SMN    0x08            /* LM81 IRQ status              */ 
+#define        I_STAT_2_SMN    0x08            /* LM81 IRQ status              */
 #define        I_STAT_2_DEG    0x04            /* DEGENERATING IRQ status      */
 #define        I_STAT_2_SIO2   0x02            /* ST16552/B IRQ status         */
 #define        I_STAT_2_SIO1   0x01            /* ST16552/A IRQ status         */
@@ -421,14 +421,14 @@
 #define        DISP_UDC_ADR    *((volatile uchar*)(DISPLAY_BASE + 0x00))       /* UDC Address Reg.    */
 #define        DISP_CWORD      *((volatile uchar*)(DISPLAY_BASE + 0x10))       /* Control Word Reg.   */
 
-#define        DISP_DIG0       *((volatile uchar*)(DISP_CHR_RAM + 0x00))       /* Digit 0 address     */      
-#define        DISP_DIG1       *((volatile uchar*)(DISP_CHR_RAM + 0x01))       /* Digit 0 address     */      
+#define        DISP_DIG0       *((volatile uchar*)(DISP_CHR_RAM + 0x00))       /* Digit 0 address     */
+#define        DISP_DIG1       *((volatile uchar*)(DISP_CHR_RAM + 0x01))       /* Digit 0 address     */
 #define        DISP_DIG2       *((volatile uchar*)(DISP_CHR_RAM + 0x02))       /* Digit 0 address     */
-#define        DISP_DIG3       *((volatile uchar*)(DISP_CHR_RAM + 0x03))       /* Digit 0 address     */      
-#define        DISP_DIG4       *((volatile uchar*)(DISP_CHR_RAM + 0x04))       /* Digit 0 address     */      
+#define        DISP_DIG3       *((volatile uchar*)(DISP_CHR_RAM + 0x03))       /* Digit 0 address     */
+#define        DISP_DIG4       *((volatile uchar*)(DISP_CHR_RAM + 0x04))       /* Digit 0 address     */
 #define        DISP_DIG5       *((volatile uchar*)(DISP_CHR_RAM + 0x05))       /* Digit 0 address     */
-#define        DISP_DIG6       *((volatile uchar*)(DISP_CHR_RAM + 0x06))       /* Digit 0 address     */      
-#define        DISP_DIG7       *((volatile uchar*)(DISP_CHR_RAM + 0x07))       /* Digit 0 address     */      
+#define        DISP_DIG6       *((volatile uchar*)(DISP_CHR_RAM + 0x06))       /* Digit 0 address     */
+#define        DISP_DIG7       *((volatile uchar*)(DISP_CHR_RAM + 0x07))       /* Digit 0 address     */
 
 
 /*-----------------------------------------------------------------------
@@ -441,6 +441,7 @@
 #define CONFIG_NET_MULTI               /* Multi ethernet cards support         */
 
 #define CONFIG_EEPRO100
+#define CFG_RX_ETH_BUFFER      8               /* use 8 rx buffer on eepro100  */
 
 #define PCI_ENET0_IOADDR       0x00104000
 #define PCI_ENET0_MEMADDR      0x82000000

diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index 9b1dc8a27796c2d97c206beac5780ab1a5661028..a4cfe25e2fc0c87736c0f7ce489859af940b11ab 100644 (file)
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -146,6 +146,8 @@
 
 #define CONFIG_VERSION_VARIABLE        1       /* include version env variable */
 
+#define CFG_RX_ETH_BUFFER      16      /* use 16 rx buffer on 405 emac */
+
 /*-----------------------------------------------------------------------
  * PCI stuff
  *-----------------------------------------------------------------------

diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h
index a265fcdc9d4a7bce7d35ce27544463ad3088f1c9..5e07d3e09bd996b1e2260085fafdbe3ae9c4298a 100644 (file)
--- a/include/configs/CPCI405AB.h
+++ b/include/configs/CPCI405AB.h
@@ -55,15 +55,7 @@
 #endif
 
 #undef CONFIG_BOOTARGS
-#define CONFIG_RAMBOOTCOMMAND                                                  \
-       "setenv bootargs root=/dev/ram rw nfsroot=$(serverip):$(rootpath) "     \
-       "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;"    \
-       "bootm ffc00000 ffca0000"
-#define CONFIG_NFSBOOTCOMMAND                                                  \
-       "setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) "     \
-       "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;"    \
-       "bootm ffc00000"
-#define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
+#define CONFIG_BOOTCOMMAND     "bootm 100000"  /* default boot command */
 
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download  */
 #define CFG_LOADS_BAUD_CHANGE  1       /* allow baudrate change        */
@@ -73,12 +65,7 @@
 
 #define CONFIG_RTC_M48T35A     1               /* ST Electronics M48 timekeeper */
 
-#if 0 /* test-only */
-#define CONFIG_BOOTP_MASK      (CONFIG_BOOTP_DEFAULT |  \
-                                CONFIG_BOOTP_VENDOREX)
-#else
 #define CONFIG_BOOTP_MASK       (CONFIG_BOOTP_DEFAULT)
-#endif
 
 #define CONFIG_COMMANDS              ( CONFIG_CMD_DFL  | \
                                CFG_CMD_DHCP    | \
@@ -147,6 +134,8 @@
 
 #define CONFIG_VERSION_VARIABLE        1       /* include version env variable */
 
+#define CFG_RX_ETH_BUFFER      16      /* use 16 rx buffer on 405 emac */
+
 /*-----------------------------------------------------------------------
  * PCI stuff
  *-----------------------------------------------------------------------
@@ -202,7 +191,7 @@
 #define CFG_FLASH_BASE         0xFFFC0000
 #define CFG_MONITOR_BASE       CFG_FLASH_BASE
 #define CFG_MONITOR_LEN                (256 * 1024)    /* Reserve 256 kB for Monitor   */
-#define CFG_MALLOC_LEN         (128 * 1024)    /* Reserve 128 kB for malloc()  */
+#define CFG_MALLOC_LEN         (256 * 1024)    /* Reserve 256 kB for malloc()  */
 
 /*
  * For booting Linux, the board info and command line data
@@ -360,7 +349,7 @@
 #define CFG_FPGA_STATUS_TS_IRQ  0x1000
 
 #define CFG_FPGA_SPARTAN2       1           /* using Xilinx Spartan 2 now    */
-#define CFG_FPGA_MAX_SIZE       64*1024     /* 64kByte is enough for XC2S15  */
+#define CFG_FPGA_MAX_SIZE       128*1024    /* 128kByte is enough for XC2S30 */
 
 /* FPGA program pin configuration */
 #define CFG_FPGA_PRG            0x04000000  /* FPGA program pin (ppc output) */

diff --git a/include/configs/CU824.h b/include/configs/CU824.h
index 40ba25a62cfba3671e68fae753dfcd06ed2ad136..ccbed311f6b192eca10dc8d77c256b9d0164832f 100644 (file)
--- a/include/configs/CU824.h
+++ b/include/configs/CU824.h
@@ -304,6 +304,7 @@
 #define CFG_ETH_IOBASE      0x00104000
 
 #define CONFIG_EEPRO100
+#define CFG_RX_ETH_BUFFER      8               /* use 8 rx buffer on eepro100  */
 #define PCI_ENET0_IOADDR       0x00104000
 #define PCI_ENET0_MEMADDR      0x80000000
 #endif /* __CONFIG_H */

diff --git a/include/configs/ELPPC.h b/include/configs/ELPPC.h
index a9e87c57987f6b6b6a02e0c327a98feebb72063a..54cdd23f23477dafd219c288e25b96ba9b4fa096 100644 (file)
--- a/include/configs/ELPPC.h
+++ b/include/configs/ELPPC.h
@@ -333,6 +333,7 @@
 
 #define CONFIG_NET_MULTI        /* Multi ethernet cards support */
 #define CONFIG_EEPRO100
+#define CFG_RX_ETH_BUFFER      8               /* use 8 rx buffer on eepro100  */
 #define CONFIG_EEPRO100_SROM_WRITE
 
 #endif    /* __CONFIG_H */

diff --git a/include/configs/OXC.h b/include/configs/OXC.h
index 7a60e4b6eef4aa24d97f6c8f3babc5033fa60747..57f577d2bb1999c0a607d5f7a3bf9d96b5591f7a 100644 (file)
--- a/include/configs/OXC.h
+++ b/include/configs/OXC.h
@@ -94,6 +94,7 @@
 #define CONFIG_NET_MULTI                       /* Multi ethernet cards support */
 
 #define CONFIG_EEPRO100                                /* Ethernet Express PRO 100     */
+#define CFG_RX_ETH_BUFFER      8               /* use 8 rx buffer on eepro100  */
 
 #define PCI_ENET0_IOADDR       0x80000000
 #define PCI_ENET0_MEMADDR      0x80000000

diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h
index b48d0d701d4beba45ba41a73650b54a8f8d1be3f..3eb6ac3c1f2ef879d85da70e36ca125eae86c656 100644 (file)
--- a/include/configs/PCIPPC2.h
+++ b/include/configs/PCIPPC2.h
@@ -261,6 +261,7 @@
 #define CONFIG_NET_MULTI                       /* Multi ethernet cards support */
 
 #define CONFIG_EEPRO100
+#define CFG_RX_ETH_BUFFER      8               /* use 8 rx buffer on eepro100  */
 #define CONFIG_TULIP
 
 #endif /* __CONFIG_H */

diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h
index bf858ec4174fe9022bf742ffb16caaf37f43e0b7..f4dfbfefd041c5ad387fa8978267f3d8bb18d183 100644 (file)
--- a/include/configs/PCIPPC6.h
+++ b/include/configs/PCIPPC6.h
@@ -263,6 +263,7 @@
 #define CONFIG_NET_MULTI               /* Multi ethernet cards support */
 
 #define CONFIG_EEPRO100
+#define CFG_RX_ETH_BUFFER      8               /* use 8 rx buffer on eepro100  */
 #define CONFIG_TULIP
 
 

diff --git a/include/configs/PM826.h b/include/configs/PM826.h
index 018865e88e69d2af5f8c8d0af4fbc9774ec7b08d..6ba14aff149ffddaad3bbcbcfbc3f2cf2d7a2225 100644 (file)
--- a/include/configs/PM826.h
+++ b/include/configs/PM826.h
@@ -316,6 +316,7 @@
 #ifdef CONFIG_PCI
 #define CONFIG_PCI_PNP
 #define CONFIG_EEPRO100
+#define CFG_RX_ETH_BUFFER      8               /* use 8 rx buffer on eepro100  */
 #endif
 
 /*

diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h
index 6965ebee3e1750a55bfd26a48171b71ddf16c51f..3ec84ff1c3aa2c987ad429b7f3644978681a2ffa 100644 (file)
--- a/include/configs/PMC405.h
+++ b/include/configs/PMC405.h
@@ -128,6 +128,10 @@
 
 #define CONFIG_ZERO_BOOTDELAY_CHECK    /* check for keypress on bootdelay==0 */
 
+#define CONFIG_VERSION_VARIABLE        1       /* include version env variable */
+
+#define CFG_RX_ETH_BUFFER      16      /* use 16 rx buffer on 405 emac */
+
 /*-----------------------------------------------------------------------
  * PCI stuff
  *-----------------------------------------------------------------------

diff --git a/include/configs/Sandpoint8240.h b/include/configs/Sandpoint8240.h
index 0bef321e3213c332af9f6df035afdc4704cc8a04..799d5d65bdce141790a88e4d080b1286528e9086 100644 (file)
--- a/include/configs/Sandpoint8240.h
+++ b/include/configs/Sandpoint8240.h
@@ -82,6 +82,7 @@
 #define CONFIG_NET_MULTI                       /* Multi ethernet cards support */
 
 #define CONFIG_EEPRO100
+#define CFG_RX_ETH_BUFFER      8               /* use 8 rx buffer on eepro100  */
 
 #define PCI_ENET0_IOADDR       0x80000000
 #define PCI_ENET0_MEMADDR      0x80000000

diff --git a/include/configs/Sandpoint8245.h b/include/configs/Sandpoint8245.h
index aa45675ed183e7b805ee5af770a029ab9e4c6177..307c2e2daef2727257d7d852c92379cd070b6071 100644 (file)
--- a/include/configs/Sandpoint8245.h
+++ b/include/configs/Sandpoint8245.h
@@ -81,6 +81,7 @@
 #define CONFIG_NET_MULTI                       /* Multi ethernet cards support */
 
 #define CONFIG_EEPRO100
+#define CFG_RX_ETH_BUFFER      8               /* use 8 rx buffer on eepro100  */
 #define CONFIG_NATSEMI
 #define CONFIG_NS8382X
 

diff --git a/include/configs/sc520_spunk.h b/include/configs/sc520_spunk.h
index 4d5a5688f706d10c9f32ff89fbadbeb444788b1f..2b5a54d9a02fa7c62207c65a23d811d70484023d 100644 (file)
--- a/include/configs/sc520_spunk.h
+++ b/include/configs/sc520_spunk.h
@@ -36,7 +36,7 @@
 #define CONFIG_X86             1       /* This is a X86 CPU            */
 #define CONFIG_SC520           1       /* Include support for AMD SC520 */
 
-#define CFG_SDRAM_PRECHARGE_DELAY 6     /* 6T */       
+#define CFG_SDRAM_PRECHARGE_DELAY 6     /* 6T */
 #define CFG_SDRAM_REFRESH_RATE    78    /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */
 #define CFG_SDRAM_RAS_CAS_DELAY   3     /* 3T */
 
@@ -71,7 +71,7 @@
 
 #define CONFIG_BOOTDELAY       15
 #define CONFIG_BOOTARGS        "root=/dev/mtdblock1 console=ttyS0,9600 mtdparts=phys:7936k(root),256k(uboot) "
-#define CONFIG_BOOTCOMMAND     "setenv bootargs root=/dev/nfs ip=autoconf console=ttyS0,9600 mtdparts=phys:7808k(root),128k(env),256k(uboot); bootp; bootm" 
+#define CONFIG_BOOTCOMMAND     "setenv bootargs root=/dev/nfs ip=autoconf console=ttyS0,9600 mtdparts=phys:7808k(root),128k(env),256k(uboot); bootp; bootm"
 
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   115200          /* speed to run kgdb serial port */
@@ -123,7 +123,7 @@
 #define CONFIG_SPI_EEPROM       /* SPI EEPROMs such as AT25010 or AT25640 */
 #define CONFIG_MW_EEPROM        /* MicroWire EEPROMS such as AT93LC46 */
 #define CONFIG_DS1722           /* Dallas DS1722 SPI Temperature probe */
-                                
+
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
@@ -131,7 +131,7 @@
 
 #if 0
 /* Environment in flash */
-#define CFG_ENV_IS_IN_FLASH     1 
+#define CFG_ENV_IS_IN_FLASH     1
 # define CFG_ENV_ADDR          (0x387a0000)    /* Addr of Environment Sector   */
 # define CFG_ENV_SIZE          0x20000 /* Total Size of Environment Sector (or 0x10000) */
 # define CFG_ENV_OFFSET         0
@@ -143,7 +143,7 @@
 # define CONFIG_SPI
 # define CONFIG_SPI_X 1
 # define CFG_ENV_SIZE          0x2000  /* Total Size of Environment EEPROM     */
-# define CFG_ENV_OFFSET         0x1c00      
+# define CFG_ENV_OFFSET         0x1c00
 
 #endif
 
@@ -155,6 +155,7 @@
  */
 #define CONFIG_NET_MULTI        /* Multi ethernet cards support */
 #define CONFIG_EEPRO100
+#define CFG_RX_ETH_BUFFER      8               /* use 8 rx buffer on eepro100  */
 
 /************************************************************
  * IDE/ATA stuff
@@ -204,8 +205,8 @@
 #define CONFIG_PCI_SCAN_SHOW
 
 #define        CFG_FIRST_PCI_IRQ   9
-#define        CFG_SECOND_PCI_IRQ  10 
-#define CFG_THIRD_PCI_IRQ   11 
+#define        CFG_SECOND_PCI_IRQ  10
+#define CFG_THIRD_PCI_IRQ   11
 #define        CFG_FORTH_PCI_IRQ   12
 
 

diff --git a/include/configs/utx8245.h b/include/configs/utx8245.h
index 80cfe8a199043423f6e7e715ffd91c47d2d0e741..4c4c279fa185e1e9cb1f8b08963a50663bd7195e 100644 (file)
--- a/include/configs/utx8245.h
+++ b/include/configs/utx8245.h
@@ -125,6 +125,7 @@ protect on $(u-boot_startaddr) $(u-boot_endaddr)"
 #define CONFIG_PCI_SCAN_SHOW
 #define CONFIG_NET_MULTI
 #define CONFIG_EEPRO100
+#define CFG_RX_ETH_BUFFER      8               /* use 8 rx buffer on eepro100  */
 #define CONFIG_EEPRO100_SROM_WRITE
 
 #define PCI_ENET0_IOADDR       0xF0000000