+++ /dev/null
-/*
- * (C) Copyright 2008-2009
- * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
- * Jens Scharsig <esw@bus-elektronik.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <exports.h>
-#include <net.h>
-#include <netdev.h>
-#include <nand.h>
-
-#include <asm/io.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/at91_pio.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_mc.h>
-#include <asm/arch/at91_common.h>
-
-#ifdef CONFIG_STATUS_LED
-#include <status_led.h>
-#endif
-
-#ifdef CONFIG_VIDEO
-#include <bus_vcxk.h>
-
-extern unsigned long display_width;
-extern unsigned long display_height;
-#endif
-
-#ifdef CONFIG_CMD_NAND
-void cpux9k2_nand_hw_init(void);
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init(void)
-{
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
-
- /* Correct IRDA resistor problem / Set PA23_TXD in Output */
- writel(ATMEL_PMX_AA_TXD2, &pio->pioa.oer);
-
- gd->bd->bi_arch_number = MACH_TYPE_EB_CPUX9K2;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-#ifdef CONFIG_STATUS_LED
- status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
-#endif
-#ifdef CONFIG_CMD_NAND
- cpux9k2_nand_hw_init();
-#endif
- return 0;
-}
-
-int board_early_init_f(void)
-{
- at91_seriald_hw_init();
- return 0;
-}
-
-#ifdef CONFIG_MISC_INIT_R
-
-int misc_init_r(void)
-{
- uchar mac[8];
- uchar tm;
- uchar midx;
- uchar macn6, macn7;
-
- if (getenv("ethaddr") == NULL) {
- if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x00,
- CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
- (uchar *) &mac, sizeof(mac)) != 0) {
- puts("Error reading MAC from EEPROM\n");
- } else {
- tm = 0;
- macn6 = 0;
- macn7 = 0xFF;
- for (midx = 0; midx < 6; midx++) {
- if ((mac[midx] != 0) && (mac[midx] != 0xFF))
- tm++;
- macn6 += mac[midx];
- macn7 ^= mac[midx];
- }
- if ((macn6 != mac[6]) || (macn7 != mac[7]))
- tm = 0;
- if (tm)
- eth_setenv_enetaddr("ethaddr", mac);
- else
- puts("Error: invalid MAC at EEPROM\n");
- }
- }
- gd->jt->do_reset = do_reset;
-
-#ifdef CONFIG_STATUS_LED
- status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
-#endif
- return 0;
-}
-#endif
-
-#ifdef CONFIG_RESET_PHY_R
-void reset_phy(void)
-{
- udelay(10000);
- eth_init();
-}
-#endif
-
-/*
- * DRAM initialisations
- */
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
- return 0;
-}
-
-/*
- * Ethernet initialisations
- */
-
-#ifdef CONFIG_DRIVER_AT91EMAC
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
- rc = at91emac_register(bis, (u32) ATMEL_BASE_EMAC);
- return rc;
-}
-#endif
-
-/*
- * Disk On Chip (NAND) Millenium initialization.
- * The NAND lives in the CS2* space
- */
-#if defined(CONFIG_CMD_NAND)
-
-#define MASK_ALE (1 << 22) /* our ALE is AD22 */
-#define MASK_CLE (1 << 21) /* our CLE is AD21 */
-
-void cpux9k2_nand_hw_init(void)
-{
- unsigned long csr;
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_mc_t *mc = (at91_mc_t *) ATMEL_BASE_MC;
-
- /* Setup Smart Media, fitst enable the address range of CS3 */
- writel(readl(&mc->ebi.csa) | AT91_EBI_CSA_CS3A, &mc->ebi.csa);
-
- /* RWH = 1 | RWS = 0 | TDF = 1 | NWS = 3 */
- csr = AT91_SMC_CSR_RWHOLD(1) | AT91_SMC_CSR_TDF(1) |
- AT91_SMC_CSR_NWS(3) |
- AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_8 |
- AT91_SMC_CSR_WSEN;
- writel(csr, &mc->smc.csr[3]);
-
- writel(ATMEL_PMX_CA_SMOE | ATMEL_PMX_CA_SMWE, &pio->pioc.asr);
- writel(ATMEL_PMX_CA_BFCK | ATMEL_PMX_CA_SMOE | ATMEL_PMX_CA_SMWE,
- &pio->pioc.pdr);
-
- /* Configure PC2 as input (signal Nand READY ) */
- writel(ATMEL_PMX_CA_BFAVD, &pio->pioc.per);
- writel(ATMEL_PMX_CA_BFAVD, &pio->pioc.odr); /* disable output */
- writel(ATMEL_PMX_CA_BFCK, &pio->pioc.codr);
-
- /* PIOC clock enabling */
- writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
-}
-
-static void board_nand_hwcontrol(struct mtd_info *mtd,
- int cmd, unsigned int ctrl)
-{
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
- struct nand_chip *this = mtd->priv;
- ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
-
- if (ctrl & NAND_CTRL_CHANGE) {
- IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
-
- if (ctrl & NAND_CLE)
- IO_ADDR_W |= MASK_CLE;
- if (ctrl & NAND_ALE)
- IO_ADDR_W |= MASK_ALE;
-
- if ((ctrl & NAND_NCE))
- writel(1, &pio->pioc.codr);
- else
- writel(1, &pio->pioc.sodr);
-
- this->IO_ADDR_W = (void *) IO_ADDR_W;
- }
- if (cmd != NAND_CMD_NONE)
- writeb(cmd, this->IO_ADDR_W);
-}
-
-static int board_nand_dev_ready(struct mtd_info *mtd)
-{
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
- return ((readl(&pio->pioc.pdsr) & (1 << 2)) != 0);
-}
-
-int board_nand_init(struct nand_chip *nand)
-{
- cpux9k2_nand_hw_init();
- nand->ecc.mode = NAND_ECC_SOFT;
- nand->cmd_ctrl = board_nand_hwcontrol;
- nand->dev_ready = board_nand_dev_ready;
- nand->chip_delay = 20;
- return 0;
-}
-
-#endif
-
-#if defined(CONFIG_VIDEO)
-/*
- * drv_video_init
- * FUNCTION: initialize VCxK device
- */
-
-int drv_video_init(void)
-{
-#ifdef CONFIG_SPLASH_SCREEN
- unsigned long splash;
-#endif
- char *s;
- unsigned long csr;
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_mc_t *mc = (at91_mc_t *) ATMEL_BASE_MC;
-
- printf("Init Video as ");
- s = getenv("displaywidth");
- if (s != NULL)
- display_width = simple_strtoul(s, NULL, 10);
- else
- display_width = 256;
- s = getenv("displayheight");
- if (s != NULL)
- display_height = simple_strtoul(s, NULL, 10);
- else
- display_height = 256;
- printf("%ld x %ld pixel matrix\n", display_width, display_height);
-
- /* RWH = 2 | RWS =2 | TDF = 4 | NWS = 0x6 */
- csr = AT91_SMC_CSR_RWHOLD(2) | AT91_SMC_CSR_RWSETUP(2) |
- AT91_SMC_CSR_TDF(4) | AT91_SMC_CSR_NWS(6) |
- AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 |
- AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN;
- writel(csr, &mc->smc.csr[2]);
- writel(1 << ATMEL_ID_PIOB, &pmc->pcer);
-
- vcxk_init(display_width, display_height);
-#ifdef CONFIG_SPLASH_SCREEN
- s = getenv("splashimage");
- if (s != NULL) {
- splash = simple_strtoul(s, NULL, 16);
- printf("use splashimage: %lx\n", splash);
- video_display_bitmap(splash, 0, 0);
- }
-#endif
- return 0;
-}
-#endif
-
-#ifdef CONFIG_SYS_I2C_SOFT
-
-void i2c_init_board(void)
-{
- u32 pin;
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
-
- writel(1 << ATMEL_ID_PIOA, &pmc->pcer);
- pin = ATMEL_PMX_AA_TWD | ATMEL_PMX_AA_TWCK;
- writel(pin, &pio->pioa.idr);
- writel(pin, &pio->pioa.pudr);
- writel(pin, &pio->pioa.per);
- writel(pin, &pio->pioa.oer);
- writel(pin, &pio->pioa.sodr);
-}
-
-#endif
-
-/*--------------------------------------------------------------------------*/
-
-#ifdef CONFIG_STATUS_LED
-
-void __led_toggle(led_id_t mask)
-{
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
-
- if (readl(&pio->piod.odsr) & mask)
- writel(mask, &pio->piod.codr);
- else
- writel(mask, &pio->piod.codr);
-}
-
-void __led_init(led_id_t mask, int state)
-{
- at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
-
- writel(1 << ATMEL_ID_PIOD, &pmc->pcer); /* Enable PIOB clock */
- /* Disable peripherals on LEDs */
- writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.per);
- /* Enable pins as outputs */
- writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.oer);
- /* Turn all LEDs OFF */
- writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.sodr);
-
- __led_set(mask, state);
-}
-
-void __led_set(led_id_t mask, int state)
-{
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
- if (state == STATUS_LED_ON)
- writel(mask, &pio->piod.codr);
- else
- writel(mask, &pio->piod.sodr);
-}
-
-#endif
-
-/*---------------------------------------------------------------------------*/
-
-int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- int rcode = 0;
- ulong side;
- ulong bright;
-
- switch (argc) {
- case 3:
- side = simple_strtoul(argv[1], NULL, 10);
- bright = simple_strtoul(argv[2], NULL, 10);
- if ((side >= 0) && (side <= 3) &&
- (bright >= 0) && (bright <= 1000)) {
- vcxk_setbrightness(side, bright);
- rcode = 0;
- } else {
- printf("parameters out of range\n");
- printf("Usage:\n%s\n", cmdtp->usage);
- rcode = 1;
- }
- break;
- default:
- printf("Usage:\n%s\n", cmdtp->usage);
- rcode = 1;
- break;
- }
- return rcode;
-}
-
-/*---------------------------------------------------------------------------*/
-
-U_BOOT_CMD(
- bright, 3, 0, do_brightness,
- "bright - sets the display brightness\n",
- " <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
-);
-
-/* EOF cpu9k2.c */
+++ /dev/null
-/*
- * (C) Copyright 2008-2009
- * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
- * Jens Scharsig <esw@bus-elektronik.de>
- *
- * Configuation settings for the EB+CPUx9K2 board.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _CONFIG_EB_CPUx9K2_H_
-#define _CONFIG_EB_CPUx9K2_H_
-
-/*--------------------------------------------------------------------------*/
-
-#define CONFIG_AT91RM9200 /* It's an Atmel AT91RM9200 SoC */
-#define CONFIG_EB_CPUX9K2 /* on an EP+CPUX9K2 Board */
-#define USE_920T_MMU
-
-#define CONFIG_VERSION_VARIABLE
-#define CONFIG_IDENT_STRING " on EB+CPUx9K2"
-
-#include <asm/hardware.h> /* needed for port definitions */
-
-#define CONFIG_MISC_INIT_R
-#define CONFIG_BOARD_EARLY_INIT_F
-
-#define MACH_TYPE_EB_CPUX9K2 1977
-#define CONFIG_MACH_TYPE MACH_TYPE_EB_CPUX9K2
-
-#define CONFIG_SYS_CACHELINE_SIZE 32
-#define CONFIG_SYS_DCACHE_OFF
-
-/*--------------------------------------------------------------------------*/
-#ifndef CONFIG_RAMBOOT
-#define CONFIG_SYS_TEXT_BASE 0x00000000
-#else
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_TEXT_BASE 0x21800000
-#endif
-#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
-#define CONFIG_STANDALONE_LOAD_ADDR 0x21000000
-
-#define CONFIG_BOOT_RETRY_TIME 30
-#define CONFIG_CMDLINE_EDITING
-
-#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
-#define CONFIG_SYS_PBSIZE \
- (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-
-/*
- * ARM asynchronous clock
- */
-
-#define AT91C_MAIN_CLOCK 179404800 /* from 12.288 MHz * 73 / 5 */
-#define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK / 3)
-#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
-
-#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock */
-
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
-#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
-/* flash */
-#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
-#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
-
-/* clocks */
-#define CONFIG_SYS_PLLAR_VAL 0x20483E05 /* 179.4048 MHz for PCK */
-#define CONFIG_SYS_PLLBR_VAL 0x104C3E0A /* 47.3088 MHz (for USB) */
-#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Clock */
-
-/*
- * Size of malloc() pool
- */
-
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
-
-/*
- * sdram
- */
-
-#define CONFIG_NR_DRAM_BANKS 1
-
-#define CONFIG_SYS_SDRAM_BASE 0x20000000
-#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */
-#define CONFIG_SYS_INIT_SP_ADDR 0x00204000 /* use internal SRAM */
-
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
- CONFIG_SYS_SDRAM_SIZE - 0x00400000 - \
- CONFIG_SYS_MALLOC_LEN)
-
-#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* PIOC as D16/D31 */
-#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
-#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
-#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
-#define CONFIG_SYS_SDRC_CR_VAL 0x2188c159 /* set up the SDRAM */
-#define CONFIG_SYS_SDRAM 0x20000000 /* address of the SDRAM */
-#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the SDRAM */
-#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to SDRAM */
-#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
-#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
-#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
-#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
-#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
-
-/*
- * Command line configuration
- */
-#define CONFIG_CMD_BMP
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_PING
-#define CONFIG_I2C_CMD_TREE
-#define CONFIG_CMD_USB
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_UBI
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_CMD_UBIFS
-
-#define CONFIG_SYS_LONGHELP
-
-/*
- * MTD defines
- */
-
-#define CONFIG_FLASH_CFI_MTD
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_RBTREE
-#define CONFIG_LZO
-
-#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=atmel_nand"
-#define MTDPARTS_DEFAULT "mtdparts=" \
- "physmap-flash.0:" \
- "512k(U-Boot)," \
- "128k(Env)," \
- "128k(Splash)," \
- "4M(Kernel)," \
- "384k(MiniFS)," \
- "-(FS)" \
- ";" \
- "atmel_nand:" \
- "1M(emergency)," \
- "-(data)"
-/*
- * Hardware drivers
- */
-#define CONFIG_USB_ATMEL
-#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
-#define CONFIG_USB_OHCI_NEW
-#define CONFIG_AT91C_PQFP_UHPBUG
-#define CONFIG_USB_STORAGE
-#define CONFIG_DOS_PARTITION
-#define CONFIG_ISO_PARTITION
-#define CONFIG_EFI_PARTITION
-
-#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
-#define CONFIG_SYS_USB_OHCI_CPU_INIT
-#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00300000
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200"
-
-/*
- * UART/CONSOLE
- */
-
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_ID 0/* ignored in arm */
-
-/*
- * network
- */
-
-#define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_RESET_PHY_R 1
-
-#define CONFIG_DRIVER_AT91EMAC 1
-#define CONFIG_DRIVER_AT91EMAC_QUIET 1
-#define CONFIG_SYS_RX_ETH_BUFFER 8
-#define CONFIG_MII 1
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/*
- * I2C-Bus
- */
-
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SOFT_SPEED 50000
-#define CONFIG_SYS_I2C_SOFT_SLAVE 0
-
-/* Software I2C driver configuration */
-
-#define AT91_PIN_SDA (1<<25) /* AT91C_PIO_PA25 */
-#define AT91_PIN_SCL (1<<26) /* AT91C_PIO_PA26 */
-
-#define CONFIG_SYS_I2C_INIT_BOARD
-
-#define I2C_INIT i2c_init_board();
-#define I2C_ACTIVE writel(ATMEL_PMX_AA_TWD, &pio->pioa.mddr);
-#define I2C_TRISTATE writel(ATMEL_PMX_AA_TWD, &pio->pioa.mder);
-#define I2C_READ ((readl(&pio->pioa.pdsr) & ATMEL_PMX_AA_TWD) != 0)
-#define I2C_SDA(bit) \
- if (bit) \
- writel(ATMEL_PMX_AA_TWD, &pio->pioa.sodr); \
- else \
- writel(ATMEL_PMX_AA_TWD, &pio->pioa.codr);
-#define I2C_SCL(bit) \
- if (bit) \
- writel(ATMEL_PMX_AA_TWCK, &pio->pioa.sodr); \
- else \
- writel(ATMEL_PMX_AA_TWCK, &pio->pioa.codr);
-
-#define I2C_DELAY udelay(2500000/CONFIG_SYS_I2C_SOFT_SPEED)
-
-/* I2C-RTC */
-
-#ifdef CONFIG_CMD_DATE
-#define CONFIG_RTC_DS1338
-#define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#endif
-
-/* EEPROM */
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-
-/* FLASH organization */
-
-/* NOR-FLASH */
-#define CONFIG_FLASH_SHOW_PROGRESS 45
-
-#define CONFIG_FLASH_CFI_DRIVER 1
-
-#define PHYS_FLASH_1 0x10000000
-#define PHYS_FLASH_SIZE 0x01000000 /* 16 megs main flash */
-#define CONFIG_SYS_FLASH_CFI 1
-#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
-
-#define CONFIG_SYS_FLASH_PROTECTION 1
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_MAX_FLASH_SECT 512
-#define CONFIG_SYS_FLASH_ERASE_TOUT 6000
-#define CONFIG_SYS_FLASH_WRITE_TOUT 2000
-
-/* NAND */
-
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE 0x40000000
-#define CONFIG_SYS_NAND_DBW_8 1
-
-/* Status LED's */
-
-#define CONFIG_STATUS_LED 1
-#define CONFIG_BOARD_SPECIFIC_LED 1
-
-#define STATUS_LED_BOOT 1
-#define STATUS_LED_ACTIVE 0
-
-#define STATUS_LED_BIT 1 /* AT91C_PIO_PD0 green LED */
-#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
-#define STATUS_LED_STATE STATUS_LED_OFF /* BLINKING */
-#define STATUS_LED_BIT1 2 /* AT91C_PIO_PD1 red LED */
-#define STATUS_LED_STATE1 STATUS_LED_ON /* BLINKING */
-#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 4)
-
-#define CONFIG_VIDEO 1
-
-/* Options */
-
-#ifdef CONFIG_VIDEO
-
-#define CONFIG_VIDEO_VCXK 1
-
-#define CONFIG_SPLASH_SCREEN 1
-
-#define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 4
-#define CONFIG_SYS_VCXK_BASE 0x30000000
-
-#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN (1<<3)
-#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT piob
-#define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR odr
-
-#define CONFIG_SYS_VCXK_ENABLE_PIN (1<<5)
-#define CONFIG_SYS_VCXK_ENABLE_PORT piob
-#define CONFIG_SYS_VCXK_ENABLE_DDR oer
-
-#define CONFIG_SYS_VCXK_REQUEST_PIN (1<<2)
-#define CONFIG_SYS_VCXK_REQUEST_PORT piob
-#define CONFIG_SYS_VCXK_REQUEST_DDR oer
-
-#define CONFIG_SYS_VCXK_INVERT_PIN (1<<4)
-#define CONFIG_SYS_VCXK_INVERT_PORT piob
-#define CONFIG_SYS_VCXK_INVERT_DDR oer
-
-#define CONFIG_SYS_VCXK_RESET_PIN (1<<6)
-#define CONFIG_SYS_VCXK_RESET_PORT piob
-#define CONFIG_SYS_VCXK_RESET_DDR oer
-
-#endif /* CONFIG_VIDEO */
-
-/* Environment */
-
-#define CONFIG_BOOTDELAY 5
-
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x80000)
-#define CONFIG_ENV_SIZE 0x20000 /* sectors are 128K here */
-
-#define CONFIG_BAUDRATE 115200
-
-#define CONFIG_BOOTCOMMAND "run nfsboot"
-
-#define CONFIG_NFSBOOTCOMMAND \
- "dhcp $(copy_addr) uImage_cpux9k2;" \
- "run bootargsdefaults;" \
- "set bootargs $(bootargs) boot=nfs " \
- ";echo $(bootargs)" \
- ";bootm"
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "displaywidth=256\0" \
- "displayheight=512\0" \
- "displaybsteps=1023\0" \
- "ubootaddr=10000000\0" \
- "splashimage=100A0000\0" \
- "kerneladdr=100C0000\0" \
- "kernelsize=00400000\0" \
- "rootfsaddr=10520000\0" \
- "copy_addr=21200000\0" \
- "rootfssize=00AE0000\0" \
- "mtdids=" MTDIDS_DEFAULT "\0" \
- "mtdparts=" MTDPARTS_DEFAULT "\0" \
- "bootargsdefaults=set bootargs " \
- "console=ttyS0,115200 " \
- "video=vcxk_fb:xres:${displaywidth}," \
- "yres:${displayheight}," \
- "bres:${displaybsteps} " \
- "mem=62M " \
- "panic=10 " \
- "uboot=\\\"${ver}\\\" " \
- "\0" \
- "update_kernel=protect off $(kerneladdr) +$(kernelsize);" \
- "dhcp $(copy_addr) uImage_cpux9k2;" \
- "erase $(kerneladdr) +$(kernelsize);" \
- "cp.b $(fileaddr) $(kerneladdr) $(filesize);" \
- "protect on $(kerneladdr) +$(kernelsize)" \
- "\0" \
- "update_root=protect off $(rootfsaddr) +$(rootfssize);" \
- "dhcp $(copy_addr) rfs;" \
- "erase $(rootfsaddr) +$(rootfssize);" \
- "cp.b $(fileaddr) $(rootfsaddr) $(filesize);" \
- "\0" \
- "update_uboot=protect off 10000000 1007FFFF;" \
- "dhcp $(copy_addr) u-boot_eb_cpux9k2;" \
- "erase 10000000 1007FFFF;" \
- "cp.b $(fileaddr) $(ubootaddr) $(filesize);" \
- "protect on 10000000 1007FFFF;reset\0" \
- "update_splash=protect off $(splashimage) +20000;" \
- "dhcp $(copy_addr) splash_eb_cpux9k2.bmp;" \
- "erase $(splashimage) +20000;" \
- "cp.b $(fileaddr) $(splashimage) $(filesize);" \
- "protect on $(splashimage) +20000;reset\0" \
- "emergency=run bootargsdefaults;" \
- "set bootargs $(bootargs) root=initramfs boot=emergency " \
- ";bootm $(kerneladdr)\0" \
- "netemergency=run bootargsdefaults;" \
- "dhcp $(copy_addr) uImage_cpux9k2;" \
- "set bootargs $(bootargs) root=initramfs boot=emergency " \
- ";bootm $(copy_addr)\0" \
- "norboot=run bootargsdefaults;" \
- "set bootargs $(bootargs) root=initramfs boot=local " \
- ";bootm $(kerneladdr)\0" \
- "nandboot=run bootargsdefaults;" \
- "set bootargs $(bootargs) root=initramfs boot=nand " \
- ";bootm $(kerneladdr)\0" \
- " "
-
-/*--------------------------------------------------------------------------*/
-
-#endif
-
-/* EOF */
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