]> git.sur5r.net Git - u-boot/commitdiff
dm: x86: Add a northbridge uclass
authorSimon Glass <sjg@chromium.org>
Sun, 17 Jan 2016 23:11:14 +0000 (16:11 -0700)
committerBin Meng <bmeng.cn@gmail.com>
Sun, 24 Jan 2016 04:08:16 +0000 (12:08 +0800)
Add a uclass for the northbridge / SDRAM controller found on some older
Intel chipsets.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/lib/Makefile
arch/x86/lib/northbridge-uclass.c [new file with mode: 0644]
include/dm/uclass-id.h

index 43792bc80ade28844adcc6e49bac3d78e88759af..d9fc296b6e4877a1a3b3a8766fe7d54f6ac54d67 100644 (file)
@@ -19,6 +19,7 @@ obj-y += lpc-uclass.o
 obj-y  += mpspec.o
 obj-$(CONFIG_ENABLE_MRC_CACHE) += mrccache.o
 obj-y += cmd_mtrr.o
+obj-y  += northbridge-uclass.o
 obj-$(CONFIG_I8259_PIC) += i8259.o
 obj-$(CONFIG_I8254_TIMER) += i8254.o
 ifndef CONFIG_DM_PCI
diff --git a/arch/x86/lib/northbridge-uclass.c b/arch/x86/lib/northbridge-uclass.c
new file mode 100644 (file)
index 0000000..64b6257
--- /dev/null
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/root.h>
+
+UCLASS_DRIVER(northbridge) = {
+       .id             = UCLASS_NORTHBRIDGE,
+       .name           = "northbridge",
+};
index cd3e7fa503ea3b025d068d4b9a09fff518e4d659..4806095c1d27fc447084536d2b85b029d478539d 100644 (file)
@@ -46,6 +46,7 @@ enum uclass_id {
        UCLASS_MMC,             /* SD / MMC card or chip */
        UCLASS_MOD_EXP,         /* RSA Mod Exp device */
        UCLASS_MTD,             /* Memory Technology Device (MTD) device */
+       UCLASS_NORTHBRIDGE,     /* Intel Northbridge / SDRAM controller */
        UCLASS_PANEL,           /* Display panel, such as an LCD */
        UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */
        UCLASS_PCH,             /* x86 platform controller hub */