]> git.sur5r.net Git - u-boot/commitdiff
microblaze: Clean up reset asm code
authorMichal Simek <monstr@monstr.eu>
Tue, 30 Aug 2011 13:22:24 +0000 (15:22 +0200)
committerMichal Simek <monstr@monstr.eu>
Mon, 3 Oct 2011 06:01:56 +0000 (08:01 +0200)
- Remove code copying
- Reset address is setup from first stage bootloader
- Support reset vector setup on little endian

Signed-off-by: Michal Simek <monstr@monstr.eu>
arch/microblaze/cpu/start.S

index 42104faf9ec7edad28accd99b9e6bb4f6f2b3d4f..9077f742ce20ca47f9cf7099ede8b15fba99d609 100644 (file)
@@ -67,26 +67,11 @@ _start:
 
        addik   r6, r0, CONFIG_SYS_RESET_ADDRESS
        sw      r6, r1, r0
-       lhu     r7, r1, r0
-       shi     r7, r0, 0x2
-       shi     r6, r0, 0x6
-/*
- * Copy U-Boot code to CONFIG_SYS_TEXT_BASE
- * solve problem with sbrk_base
- */
-#if (CONFIG_SYS_RESET_ADDRESS != CONFIG_SYS_TEXT_BASE)
-       addi    r4, r0, __end
-       addi    r5, r0, __text_start
-       rsub    r4, r5, r4      /* size = __end - __text_start */
-       addi    r6, r0, CONFIG_SYS_RESET_ADDRESS        /* source address */
-       addi    r7, r0, 0       /* counter */
-4:
-       lw      r8, r6, r7
-       sw      r8, r5, r7
-       addi    r7, r7, 0x4
-       cmp     r8, r4, r7
-       blti    r8, 4b
-#endif
+       lhu     r7, r1, r10
+       rsubi   r8, r10, 0x2
+       sh      r7, r0, r8
+       rsubi   r8, r10, 0x6
+       sh      r6, r0, r8
 #endif
 
 #ifdef CONFIG_SYS_USR_EXCEP