Add support for Ocotea pass 3 with 440GX Rev. F

Patch by Stefan Roese, 01 Nov 2005

diff --git a/CHANGELOG b/CHANGELOG
index d3f590ab41c79524c4feca7d2df170cb87f2087d..74659b68fdaa83cfaed9ddd7c3905602e35d2ce7 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,9 @@
 Changes for U-Boot 1.1.4:
 ======================================================================
 
+* Add support for Ocotea pass 3 with 440GX Rev. F
+  Patch by Stefan Roese, 01 Nov 2005
+
 * Fix external IRQ configuration on Yellowstone & Yosemite
   Patch by Stefan Roese, 28 Oct 2005
 

diff --git a/board/amcc/ocotea/ocotea.c b/board/amcc/ocotea/ocotea.c
index 5b28c3b1783041a8d3a629a4e1cae2df999a6527..3926109bd578812c291b59ef7a6b44edf6ef1ddc 100644 (file)
--- a/board/amcc/ocotea/ocotea.c
+++ b/board/amcc/ocotea/ocotea.c
@@ -506,6 +506,15 @@ void fpga_init(void)
                }
        }
 
+       /*
+        * new Ocotea with Rev. F (pass 3) chips has SMII PHY reset
+        */
+       if ((in8(FPGA_REG0) & FPGA_REG0_ECLS_MASK) == FPGA_REG0_ECLS_VER2) {
+               out8(FPGA_REG2, in8(FPGA_REG2) & ~FPGA_REG2_SMII_RESET_DISABLE);
+               udelay(10000);
+               out8(FPGA_REG2, in8(FPGA_REG2) | FPGA_REG2_SMII_RESET_DISABLE);
+       }
+
        /* Turn off the LED's */
        out8(FPGA_REG3, (in8(FPGA_REG3) & ~FPGA_REG3_STAT_MASK) |
             FPGA_REG3_STAT_LED8_DISAB | FPGA_REG3_STAT_LED4_DISAB |

diff --git a/board/amcc/ocotea/ocotea.h b/board/amcc/ocotea/ocotea.h
index 41bd4500d67d1524a631415daf50f6cb380d5961..95ce1fd3512f51ef18ae806c52b8381e7e3caff1 100644 (file)
--- a/board/amcc/ocotea/ocotea.h
+++ b/board/amcc/ocotea/ocotea.h
@@ -80,6 +80,7 @@
 #define   FPGA_REG2_EXT_INTFACE_MASK      0x04
 #define   FPGA_REG2_EXT_INTFACE_ENABLE    0x00
 #define   FPGA_REG2_EXT_INTFACE_DISABLE   0x04
+#define   FPGA_REG2_SMII_RESET_DISABLE    0x02   /*Use on Ocotea pass 3 boards*/
 #define   FPGA_REG2_DEFAULT_UART1_N       0x01
 #define FPGA_REG3                       (CFG_FPGA_BASE + 0x03)
 #define   FPGA_REG3_GIGABIT_RESET_DISABLE 0x80   /*Use on Ocotea pass 1 boards*/

diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c
index 5ec9adb7422666eb26ab342b78549c3a6a2f6ca1..d721e46b5bb22761faf908e1814f8077f649f8a5 100644 (file)
--- a/cpu/ppc4xx/cpu.c
+++ b/cpu/ppc4xx/cpu.c
@@ -178,6 +178,9 @@ int checkcpu (void)
        case PVR_440GX_RC:
                puts("GX Rev. C");
                break;
+       case PVR_440GX_RF:
+               puts("GX Rev. F");
+               break;
        case PVR_440EP_RA:
                puts("EP Rev. A");
                break;

diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index 68917c592895bbd609658ecf7c37614b9d2d0015..551da35294e3c6d68a847eb36aba239d42736dbd 100644 (file)
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -729,6 +729,7 @@
 #define PVR_440GX_RA   0x51B21850
 #define PVR_440GX_RB   0x51B21851
 #define PVR_440GX_RC   0x51B21892
+#define PVR_440GX_RF   0x51B21894
 #define PVR_405EP_RB   0x51210950
 #define PVR_601                0x00010000
 #define PVR_602                0x00050000