#define SCANMGR_STAT_ACTIVE_GET(x) (((x) & 0x80000000) >> 31)
 #define SCANMGR_STAT_WFIFOCNT_GET(x) (((x) & 0x70000000) >> 28)
 
-extern const uint32_t iocsr_scan_chain0_table[
-       ((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH / 32) + 1)];
-extern const uint32_t iocsr_scan_chain1_table[
-       ((CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH / 32) + 1)];
-extern const uint32_t iocsr_scan_chain2_table[
-       ((CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH / 32) + 1)];
-extern const uint32_t iocsr_scan_chain3_table[
-       ((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH / 32) + 1)];
-
 int scan_mgr_configure_iocsr(void);
+int iocsr_get_config_table(const unsigned int chain_id,
+                          const unsigned long **table,
+                          unsigned int *table_len);
 
 #endif /* _SCAN_MANAGER_H_ */
 
        uint32_t io_program_iter;
        uint32_t io_scan_chain_data_residual;
        uint32_t residual;
-       uint32_t i;
+       uint32_t i, ret;
        uint32_t index = 0;
-       uint32_t io_scan_chain_len_in_bits,
-       const uint32_t *iocsr_scan_chain;
-
-       switch (io_scan_chain_id) {
-       case 0:
-               io_scan_chain_len_in_bits = CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH;
-               iocsr_scan_chain = iocsr_scan_chain0_table;
-               break;
-       case 1:
-               io_scan_chain_len_in_bits = CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH;
-               iocsr_scan_chain = iocsr_scan_chain1_table;
-               break;
-       case 2:
-               io_scan_chain_len_in_bits = CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH;
-               iocsr_scan_chain = iocsr_scan_chain2_table;
-               break;
-       case 3:
-               io_scan_chain_len_in_bits = CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH;
-               iocsr_scan_chain = iocsr_scan_chain3_table;
-               break;
-       }
+       uint32_t io_scan_chain_len_in_bits;
+       const unsigned long *iocsr_scan_chain;
+
+       ret = iocsr_get_config_table(io_scan_chain_id, &iocsr_scan_chain,
+                                    &io_scan_chain_len_in_bits);
+       if (ret)
+               return 1;
 
        /*
         * De-assert reinit if the IO scan chain is intended for HIO. In
 
 #
 
 obj-y  := socfpga.o wrap_pll_config.o
-obj-$(CONFIG_SPL_BUILD) += qts/
+obj-$(CONFIG_SPL_BUILD) += qts/ wrap_iocsr_config.o
 
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-y += pinmux_config.o iocsr_config.o
+obj-y += pinmux_config.o
 
--- /dev/null
+/*
+ * Copyright (C) 2015 Marek Vasut <marex@denx.de>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <asm/arch/clock_manager.h>
+/*
+ * Yes, dear reader, we're including a C file here, this is no mistake :-)
+ */
+#include "qts/iocsr_config.c"
+
+int iocsr_get_config_table(const unsigned int chain_id,
+                          const unsigned long **table,
+                          unsigned int *table_len)
+{
+       switch (chain_id) {
+       case 0:
+               *table = iocsr_scan_chain0_table;
+               *table_len = CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH;
+               break;
+       case 1:
+               *table = iocsr_scan_chain1_table;
+               *table_len = CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH;
+               break;
+       case 2:
+               *table = iocsr_scan_chain2_table;
+               *table_len = CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH;
+               break;
+       case 3:
+               *table = iocsr_scan_chain3_table;
+               *table_len = CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH;
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       return 0;
+}
 
 
 #include <asm/arch/socfpga_base_addrs.h>
 #include "../../board/altera/socfpga/qts/pinmux_config.h"
-#include "../../board/altera/socfpga/qts/iocsr_config.h"
 
 /* U-Boot Commands */
 #define CONFIG_SYS_NO_FLASH
 
 
 #include <asm/arch/socfpga_base_addrs.h>
 #include "../../board/altera/socfpga/qts/pinmux_config.h"
-#include "../../board/altera/socfpga/qts/iocsr_config.h"
 
 /* U-Boot Commands */
 #define CONFIG_SYS_NO_FLASH