nios2: move nios2.h to arch asm directory

The nios2.h is nios2 cpu specific, and should go arch asm
directory.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>

diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c
index 36ea90bc8cc1052db5b2929968929c0cd3cbbb14..39ae97221c2a95f2b2395f4ac74318b9e6203f70 100644 (file)
--- a/arch/nios2/cpu/cpu.c
+++ b/arch/nios2/cpu/cpu.c
@@ -6,7 +6,7 @@
  */
 
 #include <common.h>
-#include <nios2.h>
+#include <asm/nios2.h>
 #include <asm/cache.h>
 
 DECLARE_GLOBAL_DATA_PTR;

diff --git a/arch/nios2/cpu/interrupts.c b/arch/nios2/cpu/interrupts.c
index b363a1feb031073e573fb3272410145d721a5dcd..9d7e193e2842d64d526b9ef5dd557f015aca14cf 100644 (file)
--- a/arch/nios2/cpu/interrupts.c
+++ b/arch/nios2/cpu/interrupts.c
@@ -9,7 +9,7 @@
  */
 
 
-#include <nios2.h>
+#include <asm/nios2.h>
 #include <asm/types.h>
 #include <asm/io.h>
 #include <asm/ptrace.h>

diff --git a/arch/nios2/include/asm/nios2.h b/arch/nios2/include/asm/nios2.h
new file mode 100644 (file)
index 0000000..abe4df3
--- /dev/null
+++ b/arch/nios2/include/asm/nios2.h
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ASM_NIOS2_H__
+#define __ASM_NIOS2_H__
+
+/*------------------------------------------------------------------------
+ * Control registers -- use with wrctl() & rdctl()
+ *----------------------------------------------------------------------*/
+#define CTL_STATUS     0               /* Processor status reg         */
+#define CTL_ESTATUS    1               /* Exception status reg         */
+#define CTL_BSTATUS    2               /* Break status reg             */
+#define CTL_IENABLE    3               /* Interrut enable reg          */
+#define CTL_IPENDING   4               /* Interrut pending reg         */
+
+/*------------------------------------------------------------------------
+ * Access to control regs
+ *----------------------------------------------------------------------*/
+
+#define rdctl(reg) __builtin_rdctl(reg)
+#define wrctl(reg, val) __builtin_wrctl(reg, val)
+
+/*------------------------------------------------------------------------
+ * Control reg bit masks
+ *----------------------------------------------------------------------*/
+#define STATUS_IE      (1<<0)          /* Interrupt enable             */
+#define STATUS_U       (1<<1)          /* User-mode                    */
+
+/*------------------------------------------------------------------------
+ * Bit-31 Cache bypass -- only valid for data access. When data cache
+ * is not implemented, bit 31 is ignored for compatibility.
+ *----------------------------------------------------------------------*/
+#define CACHE_BYPASS(a) ((a) | 0x80000000)
+#define CACHE_NO_BYPASS(a) ((a) & ~0x80000000)
+
+#endif /* __ASM_NIOS2_H__ */

diff --git a/include/nios2.h b/include/nios2.h
deleted file mode 100644 (file)
index 0539ec3..0000000
--- a/include/nios2.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#ifndef __NIOS2_H__
-#define __NIOS2_H__
-
-/*------------------------------------------------------------------------
- * Control registers -- use with wrctl() & rdctl()
- *----------------------------------------------------------------------*/
-#define CTL_STATUS     0               /* Processor status reg         */
-#define CTL_ESTATUS    1               /* Exception status reg         */
-#define CTL_BSTATUS    2               /* Break status reg             */
-#define CTL_IENABLE    3               /* Interrut enable reg          */
-#define CTL_IPENDING   4               /* Interrut pending reg         */
-
-/*------------------------------------------------------------------------
- * Access to control regs
- *----------------------------------------------------------------------*/
-
-#define rdctl(reg) __builtin_rdctl(reg)
-#define wrctl(reg, val) __builtin_wrctl(reg, val)
-
-/*------------------------------------------------------------------------
- * Control reg bit masks
- *----------------------------------------------------------------------*/
-#define STATUS_IE      (1<<0)          /* Interrupt enable             */
-#define STATUS_U       (1<<1)          /* User-mode                    */
-
-/*------------------------------------------------------------------------
- * Bit-31 Cache bypass -- only valid for data access. When data cache
- * is not implemented, bit 31 is ignored for compatibility.
- *----------------------------------------------------------------------*/
-#define CACHE_BYPASS(a) ((a) | 0x80000000)
-#define CACHE_NO_BYPASS(a) ((a) & ~0x80000000)
-
-#endif /* __NIOS2_H__ */