]> git.sur5r.net Git - u-boot/commitdiff
board: mpl: pci: Fix checkpatch.pl
authorChakra Divi <chakra@openedev.com>
Mon, 5 Jun 2017 17:39:30 +0000 (23:09 +0530)
committerTom Rini <trini@konsulko.com>
Sat, 10 Jun 2017 00:34:56 +0000 (20:34 -0400)
Fixed checkpatch.pl errors/warnings in board/mpl/common/pci.c

Signed-off-by: Chakra Divi <chakra@openedev.com>
board/mpl/common/pci.c

index cd969cb5182d4e3bb6a9b4dcaf739f2495f18ae0..ad97ffae4f3995121e3937e66b29178fe97611f7 100644 (file)
@@ -20,26 +20,35 @@ DECLARE_GLOBAL_DATA_PTR;
 #include "piix4_pci.h"
 #include "pci_parts.h"
 
+void pci_405gp_init(struct pci_controller *hose);
+
 void pci_pip405_write_regs(struct pci_controller *hose, pci_dev_t dev,
-                          struct pci_config_table *entry)
+               struct pci_config_table *entry)
 {
        struct pci_pip405_config_entry *table;
        int i;
 
-       table = (struct pci_pip405_config_entry*) entry->priv[0];
+       table = (struct pci_pip405_config_entry *)entry->priv[0];
 
-       for (i=0; table[i].width; i++)
-       {
+       for (i = 0; table[i].width; i++) {
 #ifdef DEBUG
                printf("Reg 0x%02X Value 0x%08lX Width %02d written\n",
                       table[i].index, table[i].val, table[i].width);
 #endif
 
-               switch(table[i].width)
-               {
-               case 1: pci_hose_write_config_byte(hose, dev, table[i].index, table[i].val); break;
-               case 2: pci_hose_write_config_word(hose, dev, table[i].index, table[i].val); break;
-               case 4: pci_hose_write_config_dword(hose, dev, table[i].index, table[i].val); break;
+               switch (table[i].width) {
+               case 1:
+                   pci_hose_write_config_byte(hose, dev,
+                                              table[i].index, table[i].val);
+                   break;
+               case 2:
+                   pci_hose_write_config_word(hose, dev,
+                                              table[i].index, table[i].val);
+                   break;
+               case 4:
+                   pci_hose_write_config_dword(hose, dev,
+                                               table[i].index, table[i].val);
+                   break;
                }
        }
 }
@@ -52,26 +61,24 @@ static void pci_pip405_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
        /*
         * Write pci interrupt line register
         */
-       if(PCI_DEV(dev)==0) /* Device0 = PPC405 -> skip */
+       if (PCI_DEV(dev) == 0) /* Device0 = PPC405 -> skip */
                return;
        pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &pin);
        if ((pin == 0) || (pin > 4))
-           return;
+               return;
 
        int_line = ((PCI_DEV(dev) + (pin-1) + 10) % 4) + 28;
        pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line);
 #ifdef DEBUG
        printf("Fixup IRQ: dev %d (%x) int line %d 0x%x\n",
-              PCI_DEV(dev),dev,int_line,int_line);
+              PCI_DEV(dev), dev, int_line, int_line);
 #endif
 }
 
-extern void pci_405gp_init(struct pci_controller *hose);
-
 
 static struct pci_controller hose = {
-  config_table: pci_pip405_config_table,
-  fixup_irq: pci_pip405_fixup_irq,
+config_table: pci_pip405_config_table,
+fixup_irq : pci_pip405_fixup_irq,
 };
 
 
@@ -81,7 +88,8 @@ void pci_init_board(void)
        hose.fixup_irq    = pci_pip405_fixup_irq;
        hose.config_table = pci_pip405_config_table;
 #ifdef DEBUG
-       printf("Init PCI: fixup_irq=%p config_table=%p hose=%p\n",pci_pip405_fixup_irq,pci_pip405_config_table,hose);
+       printf("Init PCI: fixup_irq=%p config_table=%p hose=%p\n",
+              pci_pip405_fixup_irq, pci_pip405_config_table, hose);
 #endif
        pci_405gp_init(&hose);
 }