Blackfin: drop SPORT_TX read helper macros

The SPORT_TX registers cannot be read (the hardware will trigger an error),
so drop the read helper macros.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/include/asm-blackfin/mach-bf527/ADSP-EDN-BF52x-extended_cdef.h b/include/asm-blackfin/mach-bf527/ADSP-EDN-BF52x-extended_cdef.h
index 85acdd6cf75b83edfa8c32fb7fe2b7b7b915fbb2..dec7c63bad94fe889826bd7993ba1ee018ed4a24 100644 (file)
--- a/include/asm-blackfin/mach-bf527/ADSP-EDN-BF52x-extended_cdef.h
+++ b/include/asm-blackfin/mach-bf527/ADSP-EDN-BF52x-extended_cdef.h
@@ -304,7 +304,6 @@
 #define bfin_read_SPORT0_TFSDIV()      bfin_read16(SPORT0_TFSDIV)
 #define bfin_write_SPORT0_TFSDIV(val)  bfin_write16(SPORT0_TFSDIV, val)
 #define pSPORT0_TX                     ((uint32_t volatile *)SPORT0_TX) /* SPORT0 TX Data Register */
-#define bfin_read_SPORT0_TX()          bfin_read32(SPORT0_TX)
 #define bfin_write_SPORT0_TX(val)      bfin_write32(SPORT0_TX, val)
 #define pSPORT0_RX                     ((uint32_t volatile *)SPORT0_RX) /* SPORT0 RX Data Register */
 #define bfin_read_SPORT0_RX()          bfin_read32(SPORT0_RX)
@@ -370,7 +369,6 @@
 #define bfin_read_SPORT1_TFSDIV()      bfin_read16(SPORT1_TFSDIV)
 #define bfin_write_SPORT1_TFSDIV(val)  bfin_write16(SPORT1_TFSDIV, val)
 #define pSPORT1_TX                     ((uint32_t volatile *)SPORT1_TX) /* SPORT1 TX Data Register */
-#define bfin_read_SPORT1_TX()          bfin_read32(SPORT1_TX)
 #define bfin_write_SPORT1_TX(val)      bfin_write32(SPORT1_TX, val)
 #define pSPORT1_RX                     ((uint32_t volatile *)SPORT1_RX) /* SPORT1 RX Data Register */
 #define bfin_read_SPORT1_RX()          bfin_read32(SPORT1_RX)

diff --git a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h b/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h
index b9e4d6770283e29f6826434549ed3405b76dca7d..58df3016177d1203488e384ff308bd8536e356b4 100644 (file)
--- a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h
+++ b/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h
@@ -304,7 +304,6 @@
 #define bfin_read_SPORT0_TFSDIV()      bfin_read16(SPORT0_TFSDIV)
 #define bfin_write_SPORT0_TFSDIV(val)  bfin_write16(SPORT0_TFSDIV, val)
 #define pSPORT0_TX                     ((uint32_t volatile *)SPORT0_TX) /* SPORT0 TX Data Register */
-#define bfin_read_SPORT0_TX()          bfin_read32(SPORT0_TX)
 #define bfin_write_SPORT0_TX(val)      bfin_write32(SPORT0_TX, val)
 #define pSPORT0_RX                     ((uint32_t volatile *)SPORT0_RX) /* SPORT0 RX Data Register */
 #define bfin_read_SPORT0_RX()          bfin_read32(SPORT0_RX)
@@ -370,7 +369,6 @@
 #define bfin_read_SPORT1_TFSDIV()      bfin_read16(SPORT1_TFSDIV)
 #define bfin_write_SPORT1_TFSDIV(val)  bfin_write16(SPORT1_TFSDIV, val)
 #define pSPORT1_TX                     ((uint32_t volatile *)SPORT1_TX) /* SPORT1 TX Data Register */
-#define bfin_read_SPORT1_TX()          bfin_read32(SPORT1_TX)
 #define bfin_write_SPORT1_TX(val)      bfin_write32(SPORT1_TX, val)
 #define pSPORT1_RX                     ((uint32_t volatile *)SPORT1_RX) /* SPORT1 RX Data Register */
 #define bfin_read_SPORT1_RX()          bfin_read32(SPORT1_RX)

diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF542-extended_cdef.h b/include/asm-blackfin/mach-bf548/ADSP-EDN-BF542-extended_cdef.h
index e9572a0b005b55a82b22010eac07d59a06c4c169..51d9cf240aa18d457abdbb4a9dece610e97d4ac6 100644 (file)
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF542-extended_cdef.h
+++ b/include/asm-blackfin/mach-bf548/ADSP-EDN-BF542-extended_cdef.h
@@ -3577,7 +3577,6 @@
 #define bfin_read_SPORT1_TFSDIV()      bfin_read16(SPORT1_TFSDIV)
 #define bfin_write_SPORT1_TFSDIV(val)  bfin_write16(SPORT1_TFSDIV, val)
 #define pSPORT1_TX                     ((uint32_t volatile *)SPORT1_TX) /* SPORT1 Transmit Data Register */
-#define bfin_read_SPORT1_TX()          bfin_read32(SPORT1_TX)
 #define bfin_write_SPORT1_TX(val)      bfin_write32(SPORT1_TX, val)
 #define pSPORT1_RCR1                   ((uint16_t volatile *)SPORT1_RCR1) /* SPORT1 Receive Configuration 1 Register */
 #define bfin_read_SPORT1_RCR1()        bfin_read16(SPORT1_RCR1)
@@ -3643,7 +3642,6 @@
 #define bfin_read_SPORT2_TFSDIV()      bfin_read16(SPORT2_TFSDIV)
 #define bfin_write_SPORT2_TFSDIV(val)  bfin_write16(SPORT2_TFSDIV, val)
 #define pSPORT2_TX                     ((uint32_t volatile *)SPORT2_TX) /* SPORT2 Transmit Data Register */
-#define bfin_read_SPORT2_TX()          bfin_read32(SPORT2_TX)
 #define bfin_write_SPORT2_TX(val)      bfin_write32(SPORT2_TX, val)
 #define pSPORT2_RCR1                   ((uint16_t volatile *)SPORT2_RCR1) /* SPORT2 Receive Configuration 1 Register */
 #define bfin_read_SPORT2_RCR1()        bfin_read16(SPORT2_RCR1)
@@ -3709,7 +3707,6 @@
 #define bfin_read_SPORT3_TFSDIV()      bfin_read16(SPORT3_TFSDIV)
 #define bfin_write_SPORT3_TFSDIV(val)  bfin_write16(SPORT3_TFSDIV, val)
 #define pSPORT3_TX                     ((uint32_t volatile *)SPORT3_TX) /* SPORT3 Transmit Data Register */
-#define bfin_read_SPORT3_TX()          bfin_read32(SPORT3_TX)
 #define bfin_write_SPORT3_TX(val)      bfin_write32(SPORT3_TX, val)
 #define pSPORT3_RCR1                   ((uint16_t volatile *)SPORT3_RCR1) /* SPORT3 Receive Configuration 1 Register */
 #define bfin_read_SPORT3_RCR1()        bfin_read16(SPORT3_RCR1)

diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF544-extended_cdef.h b/include/asm-blackfin/mach-bf548/ADSP-EDN-BF544-extended_cdef.h
index 968cd3eb3a280ae7a0717068cce369e4e488b9f4..4c0fdf52bffaffc0921ae716909df066f91996ce 100644 (file)
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF544-extended_cdef.h
+++ b/include/asm-blackfin/mach-bf548/ADSP-EDN-BF544-extended_cdef.h
@@ -4678,7 +4678,6 @@
 #define bfin_read_SPORT1_TFSDIV()      bfin_read16(SPORT1_TFSDIV)
 #define bfin_write_SPORT1_TFSDIV(val)  bfin_write16(SPORT1_TFSDIV, val)
 #define pSPORT1_TX                     ((uint32_t volatile *)SPORT1_TX) /* SPORT1 Transmit Data Register */
-#define bfin_read_SPORT1_TX()          bfin_read32(SPORT1_TX)
 #define bfin_write_SPORT1_TX(val)      bfin_write32(SPORT1_TX, val)
 #define pSPORT1_RCR1                   ((uint16_t volatile *)SPORT1_RCR1) /* SPORT1 Receive Configuration 1 Register */
 #define bfin_read_SPORT1_RCR1()        bfin_read16(SPORT1_RCR1)
@@ -4744,7 +4743,6 @@
 #define bfin_read_SPORT2_TFSDIV()      bfin_read16(SPORT2_TFSDIV)
 #define bfin_write_SPORT2_TFSDIV(val)  bfin_write16(SPORT2_TFSDIV, val)
 #define pSPORT2_TX                     ((uint32_t volatile *)SPORT2_TX) /* SPORT2 Transmit Data Register */
-#define bfin_read_SPORT2_TX()          bfin_read32(SPORT2_TX)
 #define bfin_write_SPORT2_TX(val)      bfin_write32(SPORT2_TX, val)
 #define pSPORT2_RCR1                   ((uint16_t volatile *)SPORT2_RCR1) /* SPORT2 Receive Configuration 1 Register */
 #define bfin_read_SPORT2_RCR1()        bfin_read16(SPORT2_RCR1)
@@ -4810,7 +4808,6 @@
 #define bfin_read_SPORT3_TFSDIV()      bfin_read16(SPORT3_TFSDIV)
 #define bfin_write_SPORT3_TFSDIV(val)  bfin_write16(SPORT3_TFSDIV, val)
 #define pSPORT3_TX                     ((uint32_t volatile *)SPORT3_TX) /* SPORT3 Transmit Data Register */
-#define bfin_read_SPORT3_TX()          bfin_read32(SPORT3_TX)
 #define bfin_write_SPORT3_TX(val)      bfin_write32(SPORT3_TX, val)
 #define pSPORT3_RCR1                   ((uint16_t volatile *)SPORT3_RCR1) /* SPORT3 Receive Configuration 1 Register */
 #define bfin_read_SPORT3_RCR1()        bfin_read16(SPORT3_RCR1)

diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF547-extended_cdef.h b/include/asm-blackfin/mach-bf548/ADSP-EDN-BF547-extended_cdef.h
index bd40f356e8609586ab80ceaf740dbe57d2118d98..e0f76ae1ef8d96e6d62f908006e64fc83cab1b36 100644 (file)
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF547-extended_cdef.h
+++ b/include/asm-blackfin/mach-bf548/ADSP-EDN-BF547-extended_cdef.h
@@ -2713,7 +2713,6 @@
 #define bfin_read_SPORT0_TFSDIV()      bfin_read16(SPORT0_TFSDIV)
 #define bfin_write_SPORT0_TFSDIV(val)  bfin_write16(SPORT0_TFSDIV, val)
 #define pSPORT0_TX                     ((uint32_t volatile *)SPORT0_TX) /* SPORT0 Transmit Data Register */
-#define bfin_read_SPORT0_TX()          bfin_read32(SPORT0_TX)
 #define bfin_write_SPORT0_TX(val)      bfin_write32(SPORT0_TX, val)
 #define pSPORT0_RCR1                   ((uint16_t volatile *)SPORT0_RCR1) /* SPORT0 Receive Configuration 1 Register */
 #define bfin_read_SPORT0_RCR1()        bfin_read16(SPORT0_RCR1)
@@ -2779,7 +2778,6 @@
 #define bfin_read_SPORT1_TFSDIV()      bfin_read16(SPORT1_TFSDIV)
 #define bfin_write_SPORT1_TFSDIV(val)  bfin_write16(SPORT1_TFSDIV, val)
 #define pSPORT1_TX                     ((uint32_t volatile *)SPORT1_TX) /* SPORT1 Transmit Data Register */
-#define bfin_read_SPORT1_TX()          bfin_read32(SPORT1_TX)
 #define bfin_write_SPORT1_TX(val)      bfin_write32(SPORT1_TX, val)
 #define pSPORT1_RCR1                   ((uint16_t volatile *)SPORT1_RCR1) /* SPORT1 Receive Configuration 1 Register */
 #define bfin_read_SPORT1_RCR1()        bfin_read16(SPORT1_RCR1)
@@ -2845,7 +2843,6 @@
 #define bfin_read_SPORT2_TFSDIV()      bfin_read16(SPORT2_TFSDIV)
 #define bfin_write_SPORT2_TFSDIV(val)  bfin_write16(SPORT2_TFSDIV, val)
 #define pSPORT2_TX                     ((uint32_t volatile *)SPORT2_TX) /* SPORT2 Transmit Data Register */
-#define bfin_read_SPORT2_TX()          bfin_read32(SPORT2_TX)
 #define bfin_write_SPORT2_TX(val)      bfin_write32(SPORT2_TX, val)
 #define pSPORT2_RCR1                   ((uint16_t volatile *)SPORT2_RCR1) /* SPORT2 Receive Configuration 1 Register */
 #define bfin_read_SPORT2_RCR1()        bfin_read16(SPORT2_RCR1)
@@ -2911,7 +2908,6 @@
 #define bfin_read_SPORT3_TFSDIV()      bfin_read16(SPORT3_TFSDIV)
 #define bfin_write_SPORT3_TFSDIV(val)  bfin_write16(SPORT3_TFSDIV, val)
 #define pSPORT3_TX                     ((uint32_t volatile *)SPORT3_TX) /* SPORT3 Transmit Data Register */
-#define bfin_read_SPORT3_TX()          bfin_read32(SPORT3_TX)
 #define bfin_write_SPORT3_TX(val)      bfin_write32(SPORT3_TX, val)
 #define pSPORT3_RCR1                   ((uint16_t volatile *)SPORT3_RCR1) /* SPORT3 Receive Configuration 1 Register */
 #define bfin_read_SPORT3_RCR1()        bfin_read16(SPORT3_RCR1)

diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF548-extended_cdef.h b/include/asm-blackfin/mach-bf548/ADSP-EDN-BF548-extended_cdef.h
index 77cd5dc7793848e870cbf6abfebbe9141575bc72..caf2f6fb6dd0bb64f17957662ce274eb08b23429 100644 (file)
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF548-extended_cdef.h
+++ b/include/asm-blackfin/mach-bf548/ADSP-EDN-BF548-extended_cdef.h
@@ -4885,7 +4885,6 @@
 #define bfin_read_SPORT0_TFSDIV()      bfin_read16(SPORT0_TFSDIV)
 #define bfin_write_SPORT0_TFSDIV(val)  bfin_write16(SPORT0_TFSDIV, val)
 #define pSPORT0_TX                     ((uint32_t volatile *)SPORT0_TX) /* SPORT0 Transmit Data Register */
-#define bfin_read_SPORT0_TX()          bfin_read32(SPORT0_TX)
 #define bfin_write_SPORT0_TX(val)      bfin_write32(SPORT0_TX, val)
 #define pSPORT0_RCR1                   ((uint16_t volatile *)SPORT0_RCR1) /* SPORT0 Receive Configuration 1 Register */
 #define bfin_read_SPORT0_RCR1()        bfin_read16(SPORT0_RCR1)
@@ -4951,7 +4950,6 @@
 #define bfin_read_SPORT1_TFSDIV()      bfin_read16(SPORT1_TFSDIV)
 #define bfin_write_SPORT1_TFSDIV(val)  bfin_write16(SPORT1_TFSDIV, val)
 #define pSPORT1_TX                     ((uint32_t volatile *)SPORT1_TX) /* SPORT1 Transmit Data Register */
-#define bfin_read_SPORT1_TX()          bfin_read32(SPORT1_TX)
 #define bfin_write_SPORT1_TX(val)      bfin_write32(SPORT1_TX, val)
 #define pSPORT1_RCR1                   ((uint16_t volatile *)SPORT1_RCR1) /* SPORT1 Receive Configuration 1 Register */
 #define bfin_read_SPORT1_RCR1()        bfin_read16(SPORT1_RCR1)
@@ -5017,7 +5015,6 @@
 #define bfin_read_SPORT2_TFSDIV()      bfin_read16(SPORT2_TFSDIV)
 #define bfin_write_SPORT2_TFSDIV(val)  bfin_write16(SPORT2_TFSDIV, val)
 #define pSPORT2_TX                     ((uint32_t volatile *)SPORT2_TX) /* SPORT2 Transmit Data Register */
-#define bfin_read_SPORT2_TX()          bfin_read32(SPORT2_TX)
 #define bfin_write_SPORT2_TX(val)      bfin_write32(SPORT2_TX, val)
 #define pSPORT2_RCR1                   ((uint16_t volatile *)SPORT2_RCR1) /* SPORT2 Receive Configuration 1 Register */
 #define bfin_read_SPORT2_RCR1()        bfin_read16(SPORT2_RCR1)
@@ -5083,7 +5080,6 @@
 #define bfin_read_SPORT3_TFSDIV()      bfin_read16(SPORT3_TFSDIV)
 #define bfin_write_SPORT3_TFSDIV(val)  bfin_write16(SPORT3_TFSDIV, val)
 #define pSPORT3_TX                     ((uint32_t volatile *)SPORT3_TX) /* SPORT3 Transmit Data Register */
-#define bfin_read_SPORT3_TX()          bfin_read32(SPORT3_TX)
 #define bfin_write_SPORT3_TX(val)      bfin_write32(SPORT3_TX, val)
 #define pSPORT3_RCR1                   ((uint16_t volatile *)SPORT3_RCR1) /* SPORT3 Receive Configuration 1 Register */
 #define bfin_read_SPORT3_RCR1()        bfin_read16(SPORT3_RCR1)

diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF549-extended_cdef.h b/include/asm-blackfin/mach-bf548/ADSP-EDN-BF549-extended_cdef.h
index c5d3511b0b29ca4d3e28ca76099ae77195378acb..af90e4c62e3f6968b7bb30afb0221d033eeeaa05 100644 (file)
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF549-extended_cdef.h
+++ b/include/asm-blackfin/mach-bf548/ADSP-EDN-BF549-extended_cdef.h
@@ -5233,7 +5233,6 @@
 #define bfin_read_SPORT0_TFSDIV()      bfin_read16(SPORT0_TFSDIV)
 #define bfin_write_SPORT0_TFSDIV(val)  bfin_write16(SPORT0_TFSDIV, val)
 #define pSPORT0_TX                     ((uint32_t volatile *)SPORT0_TX) /* SPORT0 Transmit Data Register */
-#define bfin_read_SPORT0_TX()          bfin_read32(SPORT0_TX)
 #define bfin_write_SPORT0_TX(val)      bfin_write32(SPORT0_TX, val)
 #define pSPORT0_RCR1                   ((uint16_t volatile *)SPORT0_RCR1) /* SPORT0 Receive Configuration 1 Register */
 #define bfin_read_SPORT0_RCR1()        bfin_read16(SPORT0_RCR1)
@@ -5299,7 +5298,6 @@
 #define bfin_read_SPORT1_TFSDIV()      bfin_read16(SPORT1_TFSDIV)
 #define bfin_write_SPORT1_TFSDIV(val)  bfin_write16(SPORT1_TFSDIV, val)
 #define pSPORT1_TX                     ((uint32_t volatile *)SPORT1_TX) /* SPORT1 Transmit Data Register */
-#define bfin_read_SPORT1_TX()          bfin_read32(SPORT1_TX)
 #define bfin_write_SPORT1_TX(val)      bfin_write32(SPORT1_TX, val)
 #define pSPORT1_RCR1                   ((uint16_t volatile *)SPORT1_RCR1) /* SPORT1 Receive Configuration 1 Register */
 #define bfin_read_SPORT1_RCR1()        bfin_read16(SPORT1_RCR1)
@@ -5365,7 +5363,6 @@
 #define bfin_read_SPORT2_TFSDIV()      bfin_read16(SPORT2_TFSDIV)
 #define bfin_write_SPORT2_TFSDIV(val)  bfin_write16(SPORT2_TFSDIV, val)
 #define pSPORT2_TX                     ((uint32_t volatile *)SPORT2_TX) /* SPORT2 Transmit Data Register */
-#define bfin_read_SPORT2_TX()          bfin_read32(SPORT2_TX)
 #define bfin_write_SPORT2_TX(val)      bfin_write32(SPORT2_TX, val)
 #define pSPORT2_RCR1                   ((uint16_t volatile *)SPORT2_RCR1) /* SPORT2 Receive Configuration 1 Register */
 #define bfin_read_SPORT2_RCR1()        bfin_read16(SPORT2_RCR1)
@@ -5431,7 +5428,6 @@
 #define bfin_read_SPORT3_TFSDIV()      bfin_read16(SPORT3_TFSDIV)
 #define bfin_write_SPORT3_TFSDIV(val)  bfin_write16(SPORT3_TFSDIV, val)
 #define pSPORT3_TX                     ((uint32_t volatile *)SPORT3_TX) /* SPORT3 Transmit Data Register */
-#define bfin_read_SPORT3_TX()          bfin_read32(SPORT3_TX)
 #define bfin_write_SPORT3_TX(val)      bfin_write32(SPORT3_TX, val)
 #define pSPORT3_RCR1                   ((uint16_t volatile *)SPORT3_RCR1) /* SPORT3 Receive Configuration 1 Register */
 #define bfin_read_SPORT3_RCR1()        bfin_read16(SPORT3_RCR1)

diff --git a/include/asm-blackfin/mach-common/ADSP-EDN-DUAL-CORE-extended_cdef.h b/include/asm-blackfin/mach-common/ADSP-EDN-DUAL-CORE-extended_cdef.h
index c0c7e1e28b1a19b803c58b2d3c45f93c0a15cc2b..43f385021db487d6fc3f0059159192dae5cb4e33 100644 (file)
--- a/include/asm-blackfin/mach-common/ADSP-EDN-DUAL-CORE-extended_cdef.h
+++ b/include/asm-blackfin/mach-common/ADSP-EDN-DUAL-CORE-extended_cdef.h
@@ -1798,7 +1798,6 @@
 #define bfin_read_SPORT0_TX()          bfin_read32(SPORT0_TX)
 #define bfin_write_SPORT0_TX(val)      bfin_write32(SPORT0_TX, val)
 #define pSPORT0_RX                     ((uint32_t volatile *)SPORT0_RX)
-#define bfin_read_SPORT0_RX()          bfin_read32(SPORT0_RX)
 #define bfin_write_SPORT0_RX(val)      bfin_write32(SPORT0_RX, val)
 #define pSPORT0_RCR1                   ((uint16_t volatile *)SPORT0_RCR1)
 #define bfin_read_SPORT0_RCR1()        bfin_read16(SPORT0_RCR1)
@@ -1861,7 +1860,6 @@
 #define bfin_read_SPORT1_TFSDIV()      bfin_read16(SPORT1_TFSDIV)
 #define bfin_write_SPORT1_TFSDIV(val)  bfin_write16(SPORT1_TFSDIV, val)
 #define pSPORT1_TX                     ((uint32_t volatile *)SPORT1_TX)
-#define bfin_read_SPORT1_TX()          bfin_read32(SPORT1_TX)
 #define bfin_write_SPORT1_TX(val)      bfin_write32(SPORT1_TX, val)
 #define pSPORT1_RX                     ((uint32_t volatile *)SPORT1_RX)
 #define bfin_read_SPORT1_RX()          bfin_read32(SPORT1_RX)

diff --git a/include/asm-blackfin/mach-common/ADSP-EDN-extended_cdef.h b/include/asm-blackfin/mach-common/ADSP-EDN-extended_cdef.h
index fde25c0ed91c0e6236767aa24197e49aee08b8b7..2e61b5faae819d61ef520af52788cf4cee74d836 100644 (file)
--- a/include/asm-blackfin/mach-common/ADSP-EDN-extended_cdef.h
+++ b/include/asm-blackfin/mach-common/ADSP-EDN-extended_cdef.h
@@ -1039,7 +1039,6 @@
 #define bfin_read_SPORT0_TFSDIV()      bfin_read16(SPORT0_TFSDIV)
 #define bfin_write_SPORT0_TFSDIV(val)  bfin_write16(SPORT0_TFSDIV, val)
 #define pSPORT0_TX                     ((uint32_t volatile *)SPORT0_TX) /* SPORT0 TX Data Register */
-#define bfin_read_SPORT0_TX()          bfin_read32(SPORT0_TX)
 #define bfin_write_SPORT0_TX(val)      bfin_write32(SPORT0_TX, val)
 #define pSPORT0_RX                     ((uint32_t volatile *)SPORT0_RX) /* SPORT0 RX Data Register */
 #define bfin_read_SPORT0_RX()          bfin_read32(SPORT0_RX)
@@ -1081,7 +1080,6 @@
 #define bfin_read_SPORT1_TFSDIV()      bfin_read16(SPORT1_TFSDIV)
 #define bfin_write_SPORT1_TFSDIV(val)  bfin_write16(SPORT1_TFSDIV, val)
 #define pSPORT1_TX                     ((uint32_t volatile *)SPORT1_TX) /* SPORT1 TX Data Register */
-#define bfin_read_SPORT1_TX()          bfin_read32(SPORT1_TX)
 #define bfin_write_SPORT1_TX(val)      bfin_write32(SPORT1_TX, val)
 #define pSPORT1_RX                     ((uint32_t volatile *)SPORT1_RX) /* SPORT1 RX Data Register */
 #define bfin_read_SPORT1_RX()          bfin_read32(SPORT1_RX)