net: sh_eth: clean up for the SH7757's code

The SH7757's ETHER can work using the SH7724's setting. So, the patch
modifies it.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 268d88428c0227490d3e6e8e9f030883c71ea5d3..0e8cacbd41096a2443dd359b107e8658032ed9cd 100644 (file)
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -376,12 +376,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
        outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port));
 
        /* Configure e-mac registers */
-#if defined(CONFIG_CPU_SH7757)
-       outl(ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP |
-               ECSIPR_MPDIP | ECSIPR_ICDIP, ECSIPR(port));
-#else
        outl(0, ECSIPR(port));
-#endif
 
        /* Set Mac address */
        val = dev->enetaddr[0] << 24 | dev->enetaddr[1] << 16 |
@@ -395,14 +390,12 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
 #if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
        outl(0, PIPR(port));
 #endif
-#if !defined(CONFIG_CPU_SH7724)
+#if !defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
        outl(APR_AP, APR(port));
        outl(MPR_MP, MPR(port));
 #endif
 #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
        outl(TPAUSER_TPAUSE, TPAUSER(port));
-#elif defined(CONFIG_CPU_SH7757)
-       outl(TPAUSER_UNLIMITED, TPAUSER(port));
 #endif
 
 #if defined(CONFIG_CPU_SH7734)

diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 50f4b69cd312caa547430cdc770be3b4aef828d4..5276be32838dfce2b707add5687963b8c917721e 100644 (file)
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -319,7 +319,7 @@ enum EESR_BIT {
        EESR_FTC  = 0x00200000, EESR_TDE  = 0x00100000,
        EESR_TFE  = 0x00080000, EESR_FRC  = 0x00040000,
        EESR_RDE  = 0x00020000, EESR_RFE  = 0x00010000,
-#if defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
+#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
        EESR_CND  = 0x00000800,
 #endif
        EESR_DLC  = 0x00000400,
@@ -426,9 +426,7 @@ enum FELIC_MODE_BIT {
 #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 #define ECMR_CHG_DM    (ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF | ECMR_PFR | ECMR_RXF | \
                                                ECMR_TXF | ECMR_MCT)
-#elif CONFIG_CPU_SH7757
-#define ECMR_CHG_DM    (ECMR_ZPF)
-#elif CONFIG_CPU_SH7724
+#elif CONFIG_CPU_SH7724 || CONFIG_CPU_SH7757
 #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF)
 #else
 #define ECMR_CHG_DM    (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT)
@@ -473,20 +471,12 @@ enum ECSIPR_STATUS_MASK_BIT {
 
 /* APR */
 enum APR_BIT {
-#ifdef CONFIG_CPU_SH7757
-       APR_AP = 0x00000001,
-#else
        APR_AP = 0x00000004,
-#endif
 };
 
 /* MPR */
 enum MPR_BIT {
-#ifdef CONFIG_CPU_SH7757
-       MPR_MP = 0x00000001,
-#else
        MPR_MP = 0x00000006,
-#endif
 };
 
 /* TRSCER */