driver/nand: Add support of 16K SRAM for IFC 2.0

Internal SRAM has been incresed from 8KB to 16KB for IFC cotroller ver 2.0.

Update the page offset calculation logic to support the same.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 280e14e24a00290d56784639e88dd22907e3f5d7..8b453cb383c206f2e9acc4d29c425343a3703052 100644 (file)
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -23,7 +23,6 @@
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  4
 #endif
 
-#define FSL_IFC_V1_1_0 0x01010000
 #define MAX_BANKS      CONFIG_SYS_FSL_IFC_BANK_COUNT
 #define ERR_BYTE       0xFF /* Value returned for read bytes
                                when read failed */
@@ -1040,6 +1039,9 @@ static int fsl_ifc_chip_init(int devnum, u8 *addr)
        if (ret)
                return ret;
 
+       if (ver >= FSL_IFC_V2_0_0)
+               priv->bufnum_mask = (priv->bufnum_mask * 2) + 1;
+
        ret = nand_scan_ident(mtd, 1, NULL);
        if (ret)
                return ret;

diff --git a/drivers/mtd/nand/fsl_ifc_spl.c b/drivers/mtd/nand/fsl_ifc_spl.c
index 510077282cd15996f099aa47d627c63eb0a1d6ad..e336cb1c94b2c9a7d37a2ba168c45d5790f57b0b 100644 (file)
--- a/drivers/mtd/nand/fsl_ifc_spl.c
+++ b/drivers/mtd/nand/fsl_ifc_spl.c
@@ -97,7 +97,7 @@ int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
        int pages_per_blk;
        int blk_size;
        int bad_marker = 0;
-       int bufnum_mask, bufnum;
+       int bufnum_mask, bufnum, ver = 0;
 
        int csor, cspr;
        int pos = 0;
@@ -130,6 +130,10 @@ int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
                        bad_marker = 5;
        }
 
+       ver = ifc_in32(&ifc->ifc_rev);
+       if (ver >= FSL_IFC_V2_0_0)
+               bufnum_mask = (bufnum_mask * 2) + 1;
+
        pages_per_blk =
                32 << ((csor & CSOR_NAND_PB_MASK) >> CSOR_NAND_PB_SHIFT);
 

diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h
index b353b04c469363a5c3c645b73d9d6135534d6b23..11474b757c39e26a9b1d076e88d72c5df0585c9e 100644 (file)
--- a/include/fsl_ifc.h
+++ b/include/fsl_ifc.h
@@ -12,6 +12,8 @@
 #include <config.h>
 #include <common.h>
 
+#define FSL_IFC_V1_1_0 0x01010000
+#define FSL_IFC_V2_0_0 0x02000000
 
 #ifdef CONFIG_SYS_FSL_IFC_LE
 #define ifc_in32(a)       in_le32(a)