]> git.sur5r.net Git - u-boot/commitdiff
net: emaclite: Use indirect register access for TX reset
authorMichal Simek <michal.simek@xilinx.com>
Thu, 10 Dec 2015 14:32:11 +0000 (15:32 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 27 Jan 2016 14:55:52 +0000 (15:55 +0100)
Move to use indirect register access when timeout expires for resetting
TX buffers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
drivers/net/xilinx_emaclite.c

index 724b61e0b7e118aedf6c183567dd5e9e2ed7c735..72b6e0ac424a0b00b211c87fb310b6aadb2d7bbe 100644 (file)
@@ -408,6 +408,7 @@ static int emaclite_send(struct eth_device *dev, void *ptr, int len)
        u32 reg;
        u32 baseaddress;
        struct xemaclite *emaclite = dev->priv;
+       struct emaclite_regs *regs = emaclite->regs;
 
        u32 maxtry = 1000;
 
@@ -422,10 +423,9 @@ static int emaclite_send(struct eth_device *dev, void *ptr, int len)
        if (!maxtry) {
                printf("Error: Timeout waiting for ethernet TX buffer\n");
                /* Restart PING TX */
-               out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
+               out_be32(&regs->tx_ping_tsr, 0);
                if (emaclite->txpp) {
-                       out_be32 (dev->iobase + XEL_TSR_OFFSET +
-                               XEL_BUFFER_OFFSET, 0);
+                       out_be32(&regs->tx_pong_tsr, 0);
                }
                return -1;
        }