]> git.sur5r.net Git - u-boot/commitdiff
QE: add QE support on SD boot
authorZhao Qiang <qiang.zhao@nxp.com>
Thu, 25 May 2017 01:47:40 +0000 (09:47 +0800)
committerYork Sun <york.sun@nxp.com>
Fri, 2 Jun 2017 02:56:54 +0000 (19:56 -0700)
modify u_qe_init to upload QE firmware from SD card when it is SD
boot

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
drivers/qe/qe.c
include/configs/ls1021aqds.h
include/configs/ls1021atwr.h
include/configs/ls1043a_common.h
include/configs/ls1043ardb.h

index 4f0a27892f2e8e19de9f3605b0de94cdaeb1b018..24e764dc7c59ea2aa5bc0d3bdb885cb65bb1185a 100644 (file)
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <malloc.h>
 #include <command.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/immap_ls102xa.h>
 #endif
 
+#ifdef CONFIG_SYS_QE_FMAN_FW_IN_MMC
+#include <mmc.h>
+#endif
+
 #define MPC85xx_DEVDISR_QE_DISABLE     0x1
 
 qe_map_t               *qe_immr = NULL;
@@ -194,8 +199,37 @@ void u_qe_init(void)
 {
        qe_immr = (qe_map_t *)(CONFIG_SYS_IMMR + QE_IMMR_OFFSET);
 
-       u_qe_upload_firmware((const void *)CONFIG_SYS_QE_FW_ADDR);
+       void *addr = (void *)CONFIG_SYS_QE_FW_ADDR;
+#ifdef CONFIG_SYS_QE_FMAN_FW_IN_MMC
+       int dev = CONFIG_SYS_MMC_ENV_DEV;
+       u32 cnt = CONFIG_SYS_QE_FMAN_FW_LENGTH / 512;
+       u32 blk = CONFIG_SYS_QE_FW_ADDR / 512;
+
+       if (mmc_initialize(gd->bd)) {
+               printf("%s: mmc_initialize() failed\n", __func__);
+               return;
+       }
+       addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
+       struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV);
+
+       if (!mmc) {
+               free(addr);
+               printf("\nMMC cannot find device for ucode\n");
+       } else {
+               printf("\nMMC read: dev # %u, block # %u, count %u ...\n",
+                      dev, blk, cnt);
+               mmc_init(mmc);
+               (void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
+                                               addr);
+               /* flush cache after read */
+               flush_cache((ulong)addr, cnt * 512);
+       }
+#endif
+       u_qe_upload_firmware(addr);
        out_be32(&qe_immr->iram.iready, QE_IRAM_READY);
+#ifdef CONFIG_SYS_QE_FMAN_FW_IN_MMC
+       free(addr);
+#endif
 }
 #endif
 
index 8cf4eaa0218583ff724e0e1486a87bb8d39ed620..152954165cc802e978a68a653508e32b95474f2f 100644 (file)
@@ -125,6 +125,7 @@ unsigned long get_board_ddr_clk(void);
 #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
        !defined(CONFIG_QSPI_BOOT)
 #define CONFIG_U_QE
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
 #endif
 
 /*
index f0033b85d8e931dc61e400722aaea23e87f188e8..067ef4df93c32a6ceb04c02064521de825352c29 100644 (file)
 #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
        !defined(CONFIG_QSPI_BOOT)
 #define CONFIG_U_QE
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
 #endif
 
 /*
index 1b0106d5ab0b345e115277f4d955d8228f75ed5e..7fd3464fa594e9fcef352bfc6d459ee62e91beb7 100644 (file)
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
 #define CONFIG_SYS_FMAN_FW_ADDR                (512 * 0x4800)
+#define CONFIG_SYS_QE_FW_ADDR          (512 * 0x4a08)
 #elif defined(CONFIG_QSPI_BOOT)
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
 #define CONFIG_SYS_FMAN_FW_ADDR                0x40900000
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
 /* FMan fireware Pre-load address */
 #define CONFIG_SYS_FMAN_FW_ADDR                0x60900000
+#define CONFIG_SYS_QE_FW_ADDR          0x60940000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
 #define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
index 2647b150b46a7498f9292baede3ed4bd3e86517f..aaa6ee05efee3b942a2fe1cc559955ed69c58ed8 100644 (file)
 
 /* QE */
 #ifndef SPL_NO_QE
-#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
-       !defined(CONFIG_QSPI_BOOT)
+#if !defined(CONFIG_NAND_BOOT) && !defined(CONFIG_QSPI_BOOT)
 #define CONFIG_U_QE
 #endif
-#define CONFIG_SYS_QE_FW_ADDR     0x60940000
 #endif
 
 /* USB */