]> git.sur5r.net Git - u-boot/commitdiff
sf: probe: Enable macronix quad read/write cmds support
authorJagannadha Sutradharudu Teki <jaganna@xilinx.com>
Thu, 26 Dec 2013 08:46:50 +0000 (14:16 +0530)
committerJagannadha Sutradharudu Teki <jaganna@xilinx.com>
Sat, 11 Jan 2014 11:21:39 +0000 (16:51 +0530)
Added macronix flash quad read/write commands support and
it's up to the respective controller driver usecase to
configure the respective commands by defining SPI RX/TX
operation modes from include/spi.h on the driver.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
drivers/mtd/spi/sf_params.c

index ad101fb6ffb64a30d2de06a85fbd7b739cb3e0a5..4cdb4c21c8b63e57d11e73b3eb5d884d5b0cc46d 100644 (file)
@@ -40,10 +40,10 @@ const struct spi_flash_params spi_flash_params_table[] = {
        {"MX25L1605D",     0xc22015, 0x0,       64 * 1024,    32,       0,                        0},
        {"MX25L3205D",     0xc22016, 0x0,       64 * 1024,    64,       0,                        0},
        {"MX25L6405D",     0xc22017, 0x0,       64 * 1024,   128,       0,                        0},
-       {"MX25L12805",     0xc22018, 0x0,       64 * 1024,   256,       0,                        0},
-       {"MX25L25635F",    0xc22019, 0x0,       64 * 1024,   512,       0,                        0},
-       {"MX25L51235F",    0xc2201a, 0x0,       64 * 1024,  1024,       0,                        0},
-       {"MX25L12855E",    0xc22618, 0x0,       64 * 1024,   256,       0,                        0},
+       {"MX25L12805",     0xc22018, 0x0,       64 * 1024,   256, RD_FULL,                   WR_QPP},
+       {"MX25L25635F",    0xc22019, 0x0,       64 * 1024,   512, RD_FULL,                   WR_QPP},
+       {"MX25L51235F",    0xc2201a, 0x0,       64 * 1024,  1024, RD_FULL,                   WR_QPP},
+       {"MX25L12855E",    0xc22618, 0x0,       64 * 1024,   256, RD_FULL,                   WR_QPP},
 #endif
 #ifdef CONFIG_SPI_FLASH_SPANSION       /* SPANSION */
        {"S25FL008A",      0x010213, 0x0,       64 * 1024,    16,       0,                        0},