Enable both features to reduce the SPL size by 6 kiB.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_TARGET_SOCFPGA_DENX_MCVEVK=y
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_TARGET_SOCFPGA_SR1500=y
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_TARGET_SOCFPGA_SAMTEC_VINING_FPGA=y
#define CONFIG_SPL_RAM_DEVICE
#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
#define CONFIG_SPL_MAX_SIZE (64 * 1024)
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MALLOC_SIMPLE
-#endif
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT