+======================================================================
+Changes since U-Boot 1.0.0:
+======================================================================
+
+* Patch by Bernhard Kuhn, 28 Oct 2003:
+ Add low boot support for MPC5200
+
+* Fix problem with dual PCMCIA support (NSCU)
+
+* Fix MPC5200 I2C initialization function
+
======================================================================
Changes for U-Boot 1.0.0:
======================================================================
#########################################################################
## MPC5xxx Systems
#########################################################################
-MPC5200LITE \
-icecube_5200_config \
-IceCube_5200_config \
+MPC5200LITE_config \
+MPC5200LITE_LOWBOOT_config \
+MPC5200LITE_LOWBOOT08_config \
+icecube_5200_config \
+IceCube_5200_config \
IceCube_5100_config: unconfig
@ >include/config.h
+ @[ -z "$(findstring LOWBOOT,$@)" ] || \
+ { echo "TEXT_BASE = 0xFF000000" >board/icecube/config.tmp ; \
+ echo "... with LOWBOOT configuration" ; \
+ }
+ @[ -z "$(findstring LOWBOOT08,$@)" ] || \
+ { echo "TEXT_BASE = 0xFF800000" >board/icecube/config.tmp ; \
+ echo "... with 8 MB flash only" ; \
+ }
@[ -z "$(findstring 5200,$@)" ] || \
{ echo "#define CONFIG_MPC5200" >>include/config.h ; \
echo "... with MPC5200 processor" ; \
rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend
rm -f tools/env/fw_printenv tools/env/fw_setenv
rm -f board/cray/L1/bootscript.c board/cray/L1/bootscript.image
- rm -f board/trab/trab_fkt board/trab/config.tmp
+ rm -f board/trab/trab_fkt board/*/config.tmp
clobber: clean
find . -type f \
#
#
-# IceCube board
+# IceCube board:
#
+# Valid values for TEXT_BASE are:
+#
+# 0xFFF00000 boot high (standard configuration)
+# 0xFF000000 boot low for 16 MiB boards
+# 0xFF800000 boot low for 8 MiB boards
+# 0x00100000 boot from RAM (for testing only)
+#
+
+sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
-TEXT_BASE = 0xfff00000
+ifndef TEXT_BASE
+## Standard: boot high
+TEXT_BASE = 0xFFF00000
+## For testing: boot from RAM
# TEXT_BASE = 0x00100000
+endif
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
*(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
#endif
-#else
+#else /* CFG_RAMBOOT */
#ifdef CONFIG_MGT5100
*(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
#ifdef CONFIG_IDE_LED
int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
#endif
+ ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
ide_dev_desc[i].if_type=IF_TYPE_IDE;
ide_dev_desc[i].dev=i;
ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
if (retries == 0) {
do_retry = 1;
} else {
- dev_desc->type=DEV_TYPE_UNKNOWN;
return;
}
#else
- dev_desc->type=DEV_TYPE_UNKNOWN;
return;
#endif /* CONFIG_AMIGAONEG3SE */
}
{
DECLARE_GLOBAL_DATA_PTR;
static int fdr = -1;
- static int best_speed = 0;
if (fdr == -1) {
+ ulong best_speed = 0;
+ ulong divider;
ulong ipb, scl;
ulong bestmatch = 0xffffffffUL;
int best_i = 0, best_j = 0, i, j;
}
}
}
- fdr = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
- printf("%d kHz, ", best_speed / 1000);
+ divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
+ if (gd->flags & GD_FLG_RELOC) {
+ fdr = divider;
+ } else {
+ printf("%ld kHz, ", best_speed / 1000);
+ return divider;
+ }
}
return fdr;
boot_warm:
mfmsr r5 /* save msr contents */
+#if defined(CFG_LOWBOOT)
+ lis r4, CFG_DEFAULT_MBAR@h
+ lis r3, 0x0000FF00@h
+ ori r3, r3, 0x0000FF00@l
+ stw r3, 0x4(r4)
+ lis r3, 0x0000FFFF@h
+ ori r3, r3, 0x0000FFFF@l
+ stw r3, 0x8(r4)
+ lis r3, 0x00047800@h
+ ori r3, r3, 0x00047800@l
+ stw r3, 0x300(r4)
+ lis r3, 0x02010000@h
+ ori r3, r3, 0x02010000@l
+ stw r3, 0x54(r4)
+
+#if defined(CFG_LOWBOOT08)
+ lis r3, 0xff800160@h
+ ori r3, r3, 0xff800160@l
+#endif
+#if defined(CFG_LOWBOOT16)
+ lis r3, 0xff000160@h
+ ori r3, r3, 0xff000160@l
+#endif
+ mtlr r3
+ blr
+lowboot_reentry: /* FLASH_BASE + 0x160 */
+
+ lis r3, 0x0000FF00@h
+ ori r3, r3, 0x0000FF00@l
+ stw r3, 0x4c(r4)
+ lis r3, 0x0000FFFF@h
+ ori r3, r3, 0x0000FFFF@l
+ stw r3, 0x50(r4)
+ lis r3, 0x00047800@h
+ ori r3, r3, 0x00047800@l
+ stw r3, 0x300(r4)
+ lis r3, 0x02000001@h
+ ori r3, r3, 0x02000001@l
+ stw r3, 0x54(r4)
+#endif /* CFG_LOWBOOT */
+
#if defined(CFG_DEFAULT_MBAR) && !defined(CFG_RAMBOOT)
lis r3, CFG_MBAR@h
ori r3, r3, CFG_MBAR@l
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
+# define CFG_LOWBOOT 1
+# define CFG_LOWBOOT16 1
+#endif
+#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */
+# define CFG_LOWBOOT 1
+# define CFG_LOWBOOT08 1
+#endif
+
/*
* Autobooting
*/
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
-#define CONFIG_BOOTCOMMAND "bootm 100000" /* autoboot command */
-#define CONFIG_BOOTARGS "root=/dev/ram rw"
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$(serverip):$(rootpath)\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs $(bootargs) " \
+ "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
+ ":$(hostname):$(netdev):off panic=1\0" \
+ "flash_nfs=run nfsargs addip;" \
+ "bootm $(kernel_addr)\0" \
+ "flash_self=run ramargs addip;" \
+ "bootm $(kernel_addr) $(ramdisk_addr)\0" \
+ "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
+ "rootpath=/opt/eldk/ppc_82xx\0" \
+ "bootfile=/tftpboot/MPC5200/uImage\0" \
+ ""
+
+#define CONFIG_BOOTCOMMAND "run flash_self"
#if defined(CONFIG_MPC5200)
/*
/*
* Flash configuration
*/
-#define CFG_FLASH_16M 1
-
-#if !defined(CFG_FLASH_16M) /* 8Mb chips support only */
-#define CFG_FLASH_BASE 0xff800000
-#define CFG_FLASH_SIZE 0x00800000
-#define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x740000)
-#else
#define CFG_FLASH_BASE 0xff000000
#define CFG_FLASH_SIZE 0x01000000
+#if !defined(CFG_LOWBOOT)
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x740000 + 0x800000)
-#define CFG_MAX_FLASH_BANKS 2 /* max num of memory banks */
+#else /* CFG_LOWBOOT */
+#if defined(CFG_LOWBOOT08)
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x30000 + 0x800000)
#endif
+#if defined(CFG_LOWBOOT16)
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x30000)
+#endif
+#endif /* CFG_LOWBOOT */
+#define CFG_MAX_FLASH_BANKS 2 /* max num of memory banks */
#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */
#ifndef __VERSION_H__
#define __VERSION_H__
-#define U_BOOT_VERSION "U-Boot 1.0.0"
+#define U_BOOT_VERSION "U-Boot 1.0.1"
#endif /* __VERSION_H__ */