ifneq ($(CPU),mpc83xx)
COBJS-y += cpu.o
-COBJS-$(CONFIG_PCI) += pci_cfg.o
endif
COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
+++ /dev/null
-/*
- * Copyright 2009-2010 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/fsl_law.h>
-#include <pci.h>
-
-struct pci_info {
- u32 cfg;
-};
-
-/* The cfg field is a bit mask in which each bit represents the value of
- * cfg_IO_ports[] signal and the bit is set if the interface would be
- * enabled based on the value of cfg_IO_ports[] signal
- *
- * On MPC86xx/PQ3 based systems:
- * we extract cfg_IO_ports from GUTS register PORDEVSR
- *
- * cfg_IO_ports only exist on systems w/PCIe (we set cfg 0 for systems
- * without PCIe)
- */
-
-#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8560)
-static struct pci_info pci_config_info[] =
-{
- [LAW_TRGT_IF_PCI] = {
- .cfg = 0,
- },
-};
-#elif defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
-static struct pci_info pci_config_info[] =
-{
- [LAW_TRGT_IF_PCI] = {
- .cfg = 0,
- },
-};
-#elif defined(CONFIG_MPC8536)
-static struct pci_info pci_config_info[] =
-{
-};
-#elif defined(CONFIG_MPC8544)
-static struct pci_info pci_config_info[] =
-{
- [LAW_TRGT_IF_PCI] = {
- .cfg = 0,
- },
- [LAW_TRGT_IF_PCIE_1] = {
- .cfg = (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) |
- (1 << 6) | (1 << 7),
- },
- [LAW_TRGT_IF_PCIE_2] = {
- .cfg = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7),
- },
- [LAW_TRGT_IF_PCIE_3] = {
- .cfg = (1 << 6) | (1 << 7),
- },
-};
-#elif defined(CONFIG_MPC8548)
-static struct pci_info pci_config_info[] =
-{
- [LAW_TRGT_IF_PCI_1] = {
- .cfg = 0,
- },
- [LAW_TRGT_IF_PCI_2] = {
- .cfg = 0,
- },
- /* PCI_2 is always host and we dont use iosel to determine enable/disable */
- [LAW_TRGT_IF_PCIE_1] = {
- .cfg = (1 << 3) | (1 << 4) | (1 << 7),
- },
-};
-#elif defined(CONFIG_MPC8568)
-static struct pci_info pci_config_info[] =
-{
- [LAW_TRGT_IF_PCI] = {
- .cfg = 0,
- },
- [LAW_TRGT_IF_PCIE_1] = {
- .cfg = (1 << 3) | (1 << 4) | (1 << 7),
- },
-};
-#elif defined(CONFIG_MPC8569)
-static struct pci_info pci_config_info[] =
-{
- [LAW_TRGT_IF_PCIE_1] = {
- .cfg = (1 << 0) | (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) |
- (1 << 8) | (1 << 0xc) | (1 << 0xf),
- },
-};
-#elif defined(CONFIG_MPC8572)
-static struct pci_info pci_config_info[] =
-{
- [LAW_TRGT_IF_PCIE_1] = {
- .cfg = (1 << 2) | (1 << 3) | (1 << 7) |
- (1 << 0xb) | (1 << 0xc) | (1 << 0xf),
- },
- [LAW_TRGT_IF_PCIE_2] = {
- .cfg = (1 << 3) | (1 << 7),
- },
- [LAW_TRGT_IF_PCIE_3] = {
- .cfg = (1 << 7),
- },
-};
-#elif defined(CONFIG_MPC8610)
-static struct pci_info pci_config_info[] =
-{
- [LAW_TRGT_IF_PCI_1] = {
- .cfg = 0,
- },
- [LAW_TRGT_IF_PCIE_1] = {
- .cfg = (1 << 1) | (1 << 4),
- },
- [LAW_TRGT_IF_PCIE_2] = {
- .cfg = (1 << 0) | (1 << 4),
- },
-};
-#elif defined(CONFIG_MPC8641)
-static struct pci_info pci_config_info[] =
-{
- [LAW_TRGT_IF_PCIE_1] = {
- .cfg = (1 << 2) | (1 << 3) | (1 << 5) | (1 << 6) |
- (1 << 7) | (1 << 0xf),
- },
- [LAW_TRGT_IF_PCIE_2] = {
- .cfg = (1 << 3) | (1 << 0xe) | (1 << 0xf),
- },
-};
-#elif defined(CONFIG_P1011) || defined(CONFIG_P1020) || \
- defined(CONFIG_P1012) || defined(CONFIG_P1021)
-static struct pci_info pci_config_info[] =
-{
- [LAW_TRGT_IF_PCIE_1] = {
- .cfg = (1 << 0) | (1 << 6) | (1 << 0xe) | (1 << 0xf),
- },
- [LAW_TRGT_IF_PCIE_2] = {
- .cfg = (1 << 0xe),
- },
-};
-#elif defined(CONFIG_P1013) || defined(CONFIG_P1022)
-static struct pci_info pci_config_info[] =
-{
- [LAW_TRGT_IF_PCIE_1] = {
- .cfg = (1 << 6) | (1 << 7) | (1 << 9) | (1 << 0xa) |
- (1 << 0xb) | (1 << 0xd) | (1 << 0xe) |
- (1 << 0xf) | (1 << 0x15) | (1 << 0x16) |
- (1 << 0x17) | (1 << 0x18) | (1 << 0x19) |
- (1 << 0x1a) | (1 << 0x1b) | (1 << 0x1c) |
- (1 << 0x1d) | (1 << 0x1e) | (1 << 0x1f),
- },
- [LAW_TRGT_IF_PCIE_2] = {
- .cfg = (1 << 1) | (1 << 6) | (1 << 7) | (1 << 9) |
- (1 << 0xd) | (1 << 0x15) | (1 << 0x16) | (1 << 0x17) |
- (1 << 0x18) | (1 << 0x19) | (1 << 0x1a) | (1 << 0x1b),
- },
- [LAW_TRGT_IF_PCIE_3] = {
- .cfg = (1 << 0) | (1 << 1) | (1 << 6) | (1 << 7) | (1 << 9) |
- (1 << 0xa) | (1 << 0xb) | (1 << 0xd) | (1 << 0x15) |
- (1 << 0x16) | (1 << 0x17) | (1 << 0x18) | (1 << 0x1c),
- },
-};
-#elif defined(CONFIG_P2010) || defined(CONFIG_P2020)
-static struct pci_info pci_config_info[] =
-{
- [LAW_TRGT_IF_PCIE_1] = {
- .cfg = (1 << 0) | (1 << 2) | (1 << 4) | (1 << 6) |
- (1 << 0xd) | (1 << 0xe) | (1 << 0xf),
- },
- [LAW_TRGT_IF_PCIE_2] = {
- .cfg = (1 << 2) | (1 << 0xe),
- },
- [LAW_TRGT_IF_PCIE_3] = {
- .cfg = (1 << 2) | (1 << 4),
- },
-};
-#elif defined(CONFIG_FSL_CORENET)
-#else
-#error Need to define pci_config_info for processor
-#endif
-
-#ifndef CONFIG_FSL_CORENET
-int is_fsl_pci_cfg(enum law_trgt_if trgt, u32 io_sel)
-{
- return ((1 << io_sel) & pci_config_info[trgt].cfg);
-}
-#endif
#include <asm/fsl_law.h>
-int is_fsl_pci_cfg(enum law_trgt_if trgt, u32 io_sel);
-
int fsl_setup_hose(struct pci_controller *hose, unsigned long addr);
int fsl_is_pci_agent(struct pci_controller *hose);
void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data);
#include <asm/immap_85xx.h>
#include <asm/fsl_pci.h>
#include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_serdes.h>
#include <asm/io.h>
#include <miiphy.h>
#include <libfdt.h>
puts("\n");
#ifdef CONFIG_PCIE3
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
+ pcie_configured = is_serdes_configured(PCIE3);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){
SET_STD_PCIE_INFO(pci_info[num], 3);
#endif
#ifdef CONFIG_PCIE1
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+ pcie_configured = is_serdes_configured(PCIE1);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
#endif
#ifdef CONFIG_PCIE2
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
+ pcie_configured = is_serdes_configured(PCIE2);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){
SET_STD_PCIE_INFO(pci_info[num], 2);
#include <asm/immap_85xx.h>
#include <asm/fsl_pci.h>
#include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_serdes.h>
#include <spd_sdram.h>
#include <miiphy.h>
#include <libfdt.h>
#endif /* CONFIG_PCI2 */
#ifdef CONFIG_PCIE1
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+ pcie_configured = is_serdes_configured(PCIE1);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
#include <asm/immap_85xx.h>
#include <asm/fsl_pci.h>
#include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_serdes.h>
#include <spd_sdram.h>
#include <i2c.h>
#include <ioports.h>
#endif
#ifdef CONFIG_PCIE1
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+ pcie_configured = is_serdes_configured(PCIE1);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
#include <asm/immap_85xx.h>
#include <asm/fsl_pci.h>
#include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_serdes.h>
#include <asm/io.h>
#include <spd_sdram.h>
#include <i2c.h>
#endif
#ifdef CONFIG_PCIE1
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+ pcie_configured = is_serdes_configured(PCIE1);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
#include <asm/fsl_pci.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/io.h>
+#include <asm/fsl_serdes.h>
#include <miiphy.h>
#include <libfdt.h>
#include <fdt_support.h>
puts("\n");
#ifdef CONFIG_PCIE3
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
+ pcie_configured = is_serdes_configured(PCIE3);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){
SET_STD_PCIE_INFO(pci_info[num], 3);
#endif
#ifdef CONFIG_PCIE2
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
+ pcie_configured = is_serdes_configured(PCIE2);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){
SET_STD_PCIE_INFO(pci_info[num], 2);
#endif
#ifdef CONFIG_PCIE1
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+ pcie_configured = is_serdes_configured(PCIE1);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
#include <asm/immap_86xx.h>
#include <asm/fsl_pci.h>
#include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_serdes.h>
#include <i2c.h>
#include <asm/io.h>
#include <libfdt.h>
volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
struct fsl_pci_info pci_info[3];
- u32 devdisr, pordevsr, io_sel;
+ u32 devdisr, pordevsr;
int first_free_busno = 0;
int num = 0;
devdisr = in_be32(&gur->devdisr);
pordevsr = in_be32(&gur->pordevsr);
- io_sel = (pordevsr & MPC8610_PORDEVSR_IO_SEL)
- >> MPC8610_PORDEVSR_IO_SEL_SHIFT;
-
- debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
#ifdef CONFIG_PCIE1
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+ pcie_configured = is_serdes_configured(PCIE1);
if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE1)){
SET_STD_PCIE_INFO(pci_info[num], 1);
#endif
#ifdef CONFIG_PCIE2
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
+ pcie_configured = is_serdes_configured(PCIE2);
if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE2)){
SET_STD_PCIE_INFO(pci_info[num], 2);
#include <asm/immap_86xx.h>
#include <asm/fsl_pci.h>
#include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_serdes.h>
#include <asm/io.h>
#include <libfdt.h>
#include <fdt_support.h>
volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
uint devdisr = in_be32(&gur->devdisr);
- uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL)
- >> MPC8641_PORDEVSR_IO_SEL_SHIFT;
- int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+ int pcie_configured = is_serdes_configured(PCIE1);
if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
SET_STD_PCIE_INFO(pci_info[num], 1);
#include <command.h>
#include <pci.h>
#include <asm/immap_85xx.h>
+#include <asm/fsl_serdes.h>
#include <asm/io.h>
#include <asm/fsl_pci.h>
#include <libfdt.h>
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
struct fsl_pci_info pci_info[2];
- u32 devdisr, pordevsr, io_sel;
+ u32 devdisr, pordevsr;
int first_free_busno = 0;
int num = 0;
devdisr = in_be32(&gur->devdisr);
pordevsr = in_be32(&gur->pordevsr);
- io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
-
- debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
printf("eTSEC2 is in sgmii mode.\n");
puts("\n");
#ifdef CONFIG_PCIE2
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
+ pcie_configured = is_serdes_configured(PCIE2);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 2);
#endif
#ifdef CONFIG_PCIE1
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+ pcie_configured = is_serdes_configured(PCIE1);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
#include <asm/fsl_pci.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/io.h>
+#include <asm/fsl_serdes.h>
#include <miiphy.h>
#include <libfdt.h>
#include <fdt_support.h>
puts("\n");
#ifdef CONFIG_PCIE2
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
+ pcie_configured = is_serdes_configured(PCIE2);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)) {
SET_STD_PCIE_INFO(pci_info[num], 2);
#endif
#ifdef CONFIG_PCIE3
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
+ pcie_configured = is_serdes_configured(PCIE3);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)) {
SET_STD_PCIE_INFO(pci_info[num], 3);
#endif
#ifdef CONFIG_PCIE1
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+ pcie_configured = is_serdes_configured(PCIE1);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) {
SET_STD_PCIE_INFO(pci_info[num], 1);
#include <asm/immap_85xx.h>
#include <asm/fsl_pci.h>
#include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_serdes.h>
#include <spd_sdram.h>
#include <netdev.h>
#include <tsec.h>
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI2); /* disable PCI2 */
#ifdef CONFIG_PCIE1
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+ pcie_configured = is_serdes_configured(PCIE1);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
#include <asm/immap_86xx.h>
#include <asm/fsl_pci.h>
#include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_serdes.h>
#include <libfdt.h>
#include <fdt_support.h>
volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
uint devdisr = in_be32(&gur->devdisr);
- uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL)
- >> MPC8641_PORDEVSR_IO_SEL_SHIFT;
int pcie_ep;
int num = 0;
#ifdef CONFIG_PCIE1
- int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+ int pcie_configured = is_serdes_configured(PCIE1);
if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
SET_STD_PCIE_INFO(pci_info[num], 1);
#include <asm/immap_85xx.h>
#include <asm/fsl_pci.h>
#include <asm/io.h>
+#include <asm/fsl_serdes.h>
#include <linux/compiler.h>
#include <ioports.h>
#include <flash.h>
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
u32 devdisr = in_be32(&gur->devdisr);
u32 pordevsr = in_be32(&gur->pordevsr);
- __maybe_unused uint io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
- MPC85xx_PORDEVSR_IO_SEL_SHIFT;
#ifdef CONFIG_PCI1
uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32;
#endif
#ifdef CONFIG_PCIE1
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+ pcie_configured = is_serdes_configured(PCIE1);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) {
SET_STD_PCIE_INFO(pci_info[num], 1);
#include <common.h>
#include <pci.h>
#include <asm/fsl_pci.h>
+#include <asm/fsl_serdes.h>
#include <asm/io.h>
#include <linux/compiler.h>
#include <libfdt.h>
volatile ccsr_gur_t *gur = &immap->im_gur;
#endif
u32 devdisr = in_be32(&gur->devdisr);
- u32 pordevsr = in_be32(&gur->pordevsr);
- __maybe_unused uint io_sel = (pordevsr & MPC8xxx_PORDEVSR_IO_SEL) >>
- MPC8xxx_PORDEVSR_IO_SEL_SHIFT;
#ifdef CONFIG_PCI1
+ u32 pordevsr = in_be32(&gur->pordevsr);
uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD;
uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32;
uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB;
#endif
#ifdef CONFIG_PCIE1
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
+ pcie_configured = is_serdes_configured(PCIE1);
if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE1)) {
SET_STD_PCIE_INFO(pci_info[num], 1);
#endif /* CONFIG_PCIE1 */
#ifdef CONFIG_PCIE2
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
+ pcie_configured = is_serdes_configured(PCIE2);
if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE2)) {
SET_STD_PCIE_INFO(pci_info[num], 2);
#endif /* CONFIG_PCIE2 */
#ifdef CONFIG_PCIE3
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
+ pcie_configured = is_serdes_configured(PCIE3);
if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE3)) {
SET_STD_PCIE_INFO(pci_info[num], 3);