]> git.sur5r.net Git - u-boot/commitdiff
dm: spi: Correct minor nits in ICH driver
authorSimon Glass <sjg@chromium.org>
Sun, 7 Jun 2015 14:50:33 +0000 (08:50 -0600)
committerSimon Glass <sjg@chromium.org>
Wed, 15 Jul 2015 00:03:15 +0000 (18:03 -0600)
Tidy up three minor problems in this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
drivers/spi/ich.c

index 50354fdde1a40cbf0b25d4f3a35327c9b392ec36..6b6cfbf37512eb23942e40b66cfd53e29d8012da 100644 (file)
@@ -422,7 +422,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
        int using_cmd = 0;
        int ret;
 
-       /* Ee don't support writing partial bytes. */
+       /* We don't support writing partial bytes */
        if (bitlen % 8) {
                debug("ICH SPI: Accessing partial bytes not supported\n");
                return -EPROTONOSUPPORT;
@@ -601,7 +601,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
                        return status;
 
                if (status & SPIS_FCERR) {
-                       debug("ICH SPI: Data transaction error\n");
+                       debug("ICH SPI: Data transaction error %x\n", status);
                        return -EIO;
                }
 
@@ -619,7 +619,6 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
        return 0;
 }
 
-
 /*
  * This uses the SPI controller from the Intel Cougar Point and Panther Point
  * PCH to write-protect portions of the SPI flash until reboot. The changes