x86: Write configuration tables in last_stage_init()

We can write the configuration table in last_stage_init() for all x86
boards, but not with coreboot since coreboot already has them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index a9ca50b1e462196869826cf2c912b6bc0602f804..c9614f122f9c0cff27ac1e46c8495f65271e90b8 100644 (file)
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -29,6 +29,7 @@
 #include <asm/processor.h>
 #include <asm/processor-flags.h>
 #include <asm/interrupt.h>
+#include <asm/tables.h>
 #include <linux/compiler.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -593,3 +594,12 @@ void show_boot_progress(int val)
 #endif
        outb(val, POST_PORT);
 }
+
+#ifndef CONFIG_SYS_COREBOOT
+int last_stage_init(void)
+{
+       write_tables();
+
+       return 0;
+}
+#endif

diff --git a/arch/x86/include/asm/tables.h b/arch/x86/include/asm/tables.h
new file mode 100644 (file)
index 0000000..8146ba3
--- /dev/null
+++ b/arch/x86/include/asm/tables.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _X86_TABLES_H_
+#define _X86_TABLES_H_
+
+/*
+ * All x86 tables happen to like the address range from 0xf0000 to 0x100000.
+ * We use 0xf0000 as the starting address to store those tables, including
+ * PIRQ routing table, Multi-Processor table and ACPI table.
+ */
+#define ROM_TABLE_ADDR 0xf0000
+
+/**
+ * table_compute_checksum() - Compute a table checksum
+ *
+ * This computes an 8-bit checksum for the configuration table.
+ * All bytes in the configuration table, including checksum itself and
+ * reserved bytes must add up to zero.
+ *
+ * @v:         configuration table base address
+ * @len:       configuration table size
+ * @return:    the 8-bit checksum
+ */
+u8 table_compute_checksum(void *v, int len);
+
+/**
+ * write_tables() - Write x86 configuration tables
+ *
+ * This writes x86 configuration tables, including PIRQ routing table,
+ * Multi-Processor table and ACPI table. Whether a specific type of
+ * configuration table is written is controlled by a Kconfig option.
+ */
+void write_tables(void);
+
+/**
+ * write_pirq_routing_table() - Write PIRQ routing table
+ *
+ * This writes PIRQ routing table at a given address.
+ *
+ * @start:     start address to write PIRQ routing table
+ * @return:    end address of PIRQ routing table
+ */
+u32 write_pirq_routing_table(u32 start);
+
+#endif /* _X86_TABLES_H_ */

diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index e49de05c263a43fe5d533e6bdee75691e6cd6158..0de0d898d9bc8e1eefa5a266192b627b498c8409 100644 (file)
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -26,6 +26,7 @@ obj-y += relocate.o
 obj-y += physmem.o
 obj-$(CONFIG_X86_RAMTEST) += ramtest.o
 obj-y  += string.o
+obj-y  += tables.o
 obj-$(CONFIG_SYS_X86_TSC_TIMER)        += tsc_timer.o
 obj-$(CONFIG_CMD_ZBOOT)        += zimage.o
 obj-$(CONFIG_HAVE_FSP) += fsp/

diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
new file mode 100644 (file)
index 0000000..b390a4b
--- /dev/null
+++ b/arch/x86/lib/tables.c
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/tables.h>
+
+u8 table_compute_checksum(void *v, int len)
+{
+       u8 *bytes = v;
+       u8 checksum = 0;
+       int i;
+
+       for (i = 0; i < len; i++)
+               checksum -= bytes[i];
+
+       return checksum;
+}
+
+void write_tables(void)
+{
+       u32 __maybe_unused rom_table_end = ROM_TABLE_ADDR;
+
+#if CONFIG_GENERATE_PIRQ_TABLE
+       rom_table_end = write_pirq_routing_table(rom_table_end);
+       rom_table_end = ALIGN(rom_table_end, 1024);
+#endif
+}

diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 07a5aca58fd0435682cd3b501b7ef3d06e86b4fc..3e21e093587f30177dc4d4264f0c372578c1fd00 100644 (file)
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -20,6 +20,7 @@
 #define CONFIG_PHYSMEM
 #define CONFIG_DISPLAY_BOARDINFO_LATE
 #define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_LAST_STAGE_INIT
 
 #define CONFIG_LMB
 #define CONFIG_OF_LIBFDT