]> git.sur5r.net Git - u-boot/commitdiff
AVR32: Make some AT32AP700x peripherals optional
authorHaavard Skinnemoen <hskinnemoen@atmel.com>
Mon, 29 Oct 2007 12:23:33 +0000 (13:23 +0100)
committerHaavard Skinnemoen <hskinnemoen@atmel.com>
Mon, 17 Dec 2007 09:34:12 +0000 (10:34 +0100)
Add a chip-features file providing definitions of the form

AT32AP700x_CHIP_HAS_<peripheral>

to indicate the availability of the given peripheral on the currently
selected chip.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/chip-features.h [new file with mode: 0644]
include/asm-avr32/arch-at32ap700x/clk.h
include/asm-avr32/arch-at32ap700x/gpio.h

index 52f5372a607af95fad45eadc3146e71f6813da7d..2d53726b040d0ef65cb6494025d1187f1e339377 100644 (file)
@@ -21,6 +21,7 @@
  */
 #include <common.h>
 
+#include <asm/arch/chip-features.h>
 #include <asm/arch/gpio.h>
 
 /*
@@ -52,6 +53,7 @@ void gpio_enable_ebi(void)
 #endif
 }
 
+#ifdef AT32AP700x_CHIP_HAS_USART
 void gpio_enable_usart0(void)
 {
        gpio_select_periph_B(GPIO_PIN_PA8, 0);
@@ -75,7 +77,9 @@ void gpio_enable_usart3(void)
        gpio_select_periph_B(GPIO_PIN_PB18, 0);
        gpio_select_periph_B(GPIO_PIN_PB19, 0);
 }
+#endif
 
+#ifdef AT32AP700x_CHIP_HAS_MACB
 void gpio_enable_macb0(void)
 {
        gpio_select_periph_A(GPIO_PIN_PC3,  0); /* TXD0 */
@@ -125,7 +129,9 @@ void gpio_enable_macb1(void)
        gpio_select_periph_B(GPIO_PIN_PD15, 0); /* SPD  */
 #endif
 }
+#endif
 
+#ifdef AT32AP700x_CHIP_HAS_MMCI
 void gpio_enable_mmci(void)
 {
        gpio_select_periph_A(GPIO_PIN_PA10, 0); /* CLK   */
@@ -135,3 +141,4 @@ void gpio_enable_mmci(void)
        gpio_select_periph_A(GPIO_PIN_PA14, 0); /* DATA2 */
        gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */
 }
+#endif
diff --git a/include/asm-avr32/arch-at32ap700x/chip-features.h b/include/asm-avr32/arch-at32ap700x/chip-features.h
new file mode 100644 (file)
index 0000000..29b1fd6
--- /dev/null
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2007 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ASM_AVR32_ARCH_CHIP_FEATURES_H__
+#define __ASM_AVR32_ARCH_CHIP_FEATURES_H__
+
+/* Currently, all the AP700x chips have these */
+#define AT32AP700x_CHIP_HAS_USART
+#define AT32AP700x_CHIP_HAS_MMCI
+
+/* Only AP7000 has ethernet interface */
+#ifdef CONFIG_AT32AP7000
+#define AT32AP700x_CHIP_HAS_MACB
+#endif
+
+#endif /* __ASM_AVR32_ARCH_CHIP_FEATURES_H__ */
index 7e20d97b7f94132819ba737b0fa1421401d3eeb6..ea84c0874c0acc7478d8e4d4a611c105efe5aff8 100644 (file)
@@ -22,6 +22,8 @@
 #ifndef __ASM_AVR32_ARCH_CLK_H__
 #define __ASM_AVR32_ARCH_CLK_H__
 
+#include <asm/arch/chip-features.h>
+
 #ifdef CONFIG_PLL
 #define MAIN_CLK_RATE ((CFG_OSC0_HZ / CFG_PLL0_DIV) * CFG_PLL0_MUL)
 #else
@@ -50,10 +52,13 @@ static inline unsigned long get_sdram_clk_rate(void)
 {
        return get_hsb_clk_rate();
 }
+#ifdef AT32AP700x_CHIP_HAS_USART
 static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
 {
        return get_pba_clk_rate();
 }
+#endif
+#ifdef AT32AP700x_CHIP_HAS_USART
 static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
 {
        return get_pbb_clk_rate();
@@ -62,9 +67,12 @@ static inline unsigned long get_macb_hclk_rate(unsigned int dev_id)
 {
        return get_hsb_clk_rate();
 }
+#endif
+#ifdef AT32AP700x_CHIP_HAS_MMCI
 static inline unsigned long get_mci_clk_rate(void)
 {
        return get_pbb_clk_rate();
 }
+#endif
 
 #endif /* __ASM_AVR32_ARCH_CLK_H__ */
index e4812d4d08b487fd176fe09f6b531e552757f997..b10a3e4f868494a87c5ca6674da2292ce8cd8a5b 100644 (file)
@@ -22,6 +22,7 @@
 #ifndef __ASM_AVR32_ARCH_GPIO_H__
 #define __ASM_AVR32_ARCH_GPIO_H__
 
+#include <asm/arch/chip-features.h>
 #include <asm/arch/memory-map.h>
 
 #define NR_GPIO_CONTROLLERS    5
@@ -201,12 +202,19 @@ void gpio_select_periph_A(unsigned int pin, int use_pullup);
 void gpio_select_periph_B(unsigned int pin, int use_pullup);
 
 void gpio_enable_ebi(void);
+
+#ifdef AT32AP700x_CHIP_HAS_USART
 void gpio_enable_usart0(void);
 void gpio_enable_usart1(void);
 void gpio_enable_usart2(void);
 void gpio_enable_usart3(void);
+#endif
+#ifdef AT32AP700x_CHIP_HAS_MACB
 void gpio_enable_macb0(void);
 void gpio_enable_macb1(void);
+#endif
+#ifdef AT32AP700x_CHIP_HAS_MMCI
 void gpio_enable_mmci(void);
+#endif
 
 #endif /* __ASM_AVR32_ARCH_GPIO_H__ */