]> git.sur5r.net Git - u-boot/commitdiff
ARMv8/fsl-lsch3: Patch cpu node properties in DT for online cores
authorArnab Basu <arnab.basu@freescale.com>
Tue, 6 Jan 2015 21:18:41 +0000 (13:18 -0800)
committerYork Sun <yorksun@freescale.com>
Tue, 24 Feb 2015 21:08:28 +0000 (13:08 -0800)
U-Boot should only add "enable-method" and "cpu-release-address"
properties to the "cpu" node of the online cores.

Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
arch/arm/cpu/armv8/fsl-lsch3/fdt.c
arch/arm/cpu/armv8/fsl-lsch3/mp.c
arch/arm/cpu/armv8/fsl-lsch3/mp.h

index e392eb91496b8cc58faeb563c4849a473128f8c2..2287e268a2ea2be1bd38cf7f2275c8a868729be7 100644 (file)
@@ -16,7 +16,7 @@ void ft_fixup_cpu(void *blob)
        __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
        fdt32_t *reg;
        int addr_cells;
-       u64 val;
+       u64 val, core_id;
        size_t *boot_code_size = &(__secondary_boot_code_size);
 
        off = fdt_path_offset(blob, "/cpus");
@@ -29,15 +29,20 @@ void ft_fixup_cpu(void *blob)
        off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
        while (off != -FDT_ERR_NOTFOUND) {
                reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
+               core_id = of_read_number(reg, addr_cells);
                if (reg) {
-                       val = spin_tbl_addr;
-                       val += id_to_core(of_read_number(reg, addr_cells))
-                               * SPIN_TABLE_ELEM_SIZE;
-                       val = cpu_to_fdt64(val);
-                       fdt_setprop_string(blob, off, "enable-method",
-                                          "spin-table");
-                       fdt_setprop(blob, off, "cpu-release-addr",
-                                   &val, sizeof(val));
+                       if (core_id  == 0 || (is_core_online(core_id))) {
+                               val = spin_tbl_addr;
+                               val += id_to_core(core_id) *
+                                      SPIN_TABLE_ELEM_SIZE;
+                               val = cpu_to_fdt64(val);
+                               fdt_setprop_string(blob, off, "enable-method",
+                                                  "spin-table");
+                               fdt_setprop(blob, off, "cpu-release-addr",
+                                           &val, sizeof(val));
+                       } else {
+                               debug("skipping offline core\n");
+                       }
                } else {
                        puts("Warning: found cpu node without reg property\n");
                }
index 94998bf37bbcfa2c90a8d39346375c59b9cf8a98..ce9c0c1bdbeb7746b3a456a9a9c2925754e4e607 100644 (file)
@@ -83,6 +83,14 @@ int is_core_valid(unsigned int core)
        return !!((1 << core) & cpu_mask());
 }
 
+int is_core_online(u64 cpu_id)
+{
+       u64 *table;
+       int pos = id_to_core(cpu_id);
+       table = (u64 *)get_spin_tbl_addr() + pos * WORDS_PER_SPIN_TABLE_ENTRY;
+       return table[SPIN_TABLE_ELEM_STATUS_IDX] == 1;
+}
+
 int cpu_reset(int nr)
 {
        puts("Feature is not implemented.\n");
index 06ac0bcf361dc38dbafc17333c99a22690ac71de..66144d6101d504ca67235c175210cca97ada1c07 100644 (file)
@@ -32,5 +32,6 @@ int fsl_lsch3_wake_seconday_cores(void);
 void *get_spin_tbl_addr(void);
 phys_addr_t determine_mp_bootpg(void);
 void secondary_boot_func(void);
+int is_core_online(u64 cpu_id);
 #endif
 #endif /* _FSL_CH3_MP_H */