]> git.sur5r.net Git - u-boot/commitdiff
arm: socfpga: pl310: Map SDRAM to 0x0
authorMarek Vasut <marex@denx.de>
Mon, 15 Sep 2014 01:58:22 +0000 (03:58 +0200)
committerMarek Vasut <marex@denx.de>
Mon, 6 Oct 2014 15:46:50 +0000 (17:46 +0200)
Configure the PL310 address filter to make sure DRAM is mapped to 0x0.
This code also configures the "remap" register of NIC-301 and sets the
required 'mpuzero' bit.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
arch/arm/cpu/armv7/socfpga/misc.c

index b07d97ee05cbcdf93a69860f9b2529ddc1020ab4..0fc26c2b4c7ecc21e8875df1f0c5d6e52f08ba3d 100644 (file)
 #include <asm/arch/reset_manager.h>
 #include <asm/arch/system_manager.h>
 #include <asm/arch/dwmmc.h>
+#include <asm/arch/nic301.h>
+#include <asm/pl310.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static struct pl310_regs *const pl310 =
+       (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
 static struct socfpga_system_manager *sysmgr_regs =
        (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
+static struct nic301_registers *nic301_regs =
+       (struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS;
 
 int dram_init(void)
 {
@@ -142,6 +148,14 @@ int arch_cpu_init(void)
 
 int misc_init_r(void)
 {
+       /* Configure the L2 controller to make SDRAM start at 0 */
+#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
+       writel(0x2, &nic301_regs->remap);
+#else
+       writel(0x1, &nic301_regs->remap);       /* remap.mpuzero */
+       writel(0x1, &pl310->pl310_addr_filter_start);
+#endif
+
        /* Add device descriptor to FPGA device table */
        socfpga_fpga_add();
        return 0;