]> git.sur5r.net Git - u-boot/commitdiff
Tegra30: clocks: Fix clock tables for I2C and other periphs
authorTom Warren <twarren@nvidia.com>
Fri, 21 Dec 2012 22:02:45 +0000 (15:02 -0700)
committerTom Warren <twarren@nvidia.com>
Wed, 16 Jan 2013 20:40:08 +0000 (13:40 -0700)
Add 16-bit divider support (I2C) to periph table, annotate and
correct some entries, and fix clk_id lookup function.

Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/cpu/tegra30-common/clock.c
arch/arm/include/asm/arch-tegra30/clock-tables.h

index 5db9d207a2d4ba8d15e3450991d307a357981788..c67a2e1b6171da4a53053426a86e3b885c1ddedd 100644 (file)
@@ -63,6 +63,7 @@ enum clock_type_id {
        CLOCK_TYPE_MCPT,
        CLOCK_TYPE_PCM,
        CLOCK_TYPE_PCMT,
+       CLOCK_TYPE_PCMT16,
        CLOCK_TYPE_PDCT,
        CLOCK_TYPE_ACPT,
        CLOCK_TYPE_ASPTE,
@@ -114,6 +115,9 @@ static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = {
        { CLK(PERIPH),  CLK(CGENERAL),  CLK(MEMORY),    CLK(OSC),
                CLK(NONE),      CLK(NONE),      CLK(NONE),      CLK(NONE),
                MASK_BITS_31_30},
+       { CLK(PERIPH),  CLK(CGENERAL),  CLK(MEMORY),    CLK(OSC),
+               CLK(NONE),      CLK(NONE),      CLK(NONE),      CLK(NONE),
+               MASK_BITS_31_30},
        { CLK(PERIPH),  CLK(DISPLAY),   CLK(CGENERAL),  CLK(OSC),
                CLK(NONE),      CLK(NONE),      CLK(NONE),      CLK(NONE),
                MASK_BITS_31_30},
@@ -146,15 +150,15 @@ static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = {
        TYPE(PERIPHC_I2S2,      CLOCK_TYPE_AXPT),
        TYPE(PERIPHC_SPDIF_OUT, CLOCK_TYPE_AXPT),
        TYPE(PERIPHC_SPDIF_IN,  CLOCK_TYPE_PCM),
-       TYPE(PERIPHC_PWM,       CLOCK_TYPE_PCST),
+       TYPE(PERIPHC_PWM,       CLOCK_TYPE_PCST),  /* only PWM uses b29:28 */
        TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
        TYPE(PERIPHC_SBC2,      CLOCK_TYPE_PCMT),
        TYPE(PERIPHC_SBC3,      CLOCK_TYPE_PCMT),
 
        /* 0x08 */
        TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
-       TYPE(PERIPHC_I2C1,      CLOCK_TYPE_PCMT),
-       TYPE(PERIPHC_DVC_I2C,   CLOCK_TYPE_PCMT),
+       TYPE(PERIPHC_I2C1,      CLOCK_TYPE_PCMT16),
+       TYPE(PERIPHC_DVC_I2C,   CLOCK_TYPE_PCMT16),
        TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
        TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
        TYPE(PERIPHC_SBC1,      CLOCK_TYPE_PCMT),
@@ -177,7 +181,7 @@ static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = {
        TYPE(PERIPHC_VFIR,      CLOCK_TYPE_PCMT),
        TYPE(PERIPHC_EPP,       CLOCK_TYPE_MCPA),
        TYPE(PERIPHC_MPE,       CLOCK_TYPE_MCPA),
-       TYPE(PERIPHC_MIPI,      CLOCK_TYPE_PCMT),
+       TYPE(PERIPHC_MIPI,      CLOCK_TYPE_PCMT),       /* MIPI base-band HSI */
        TYPE(PERIPHC_UART1,     CLOCK_TYPE_PCMT),
        TYPE(PERIPHC_UART2,     CLOCK_TYPE_PCMT),
 
@@ -188,7 +192,7 @@ static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = {
        TYPE(PERIPHC_HDMI,      CLOCK_TYPE_PMDACD2T),
        TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
        TYPE(PERIPHC_TVDAC,     CLOCK_TYPE_PDCT),
-       TYPE(PERIPHC_I2C2,      CLOCK_TYPE_PCMT),
+       TYPE(PERIPHC_I2C2,      CLOCK_TYPE_PCMT16),
        TYPE(PERIPHC_EMC,       CLOCK_TYPE_MCPT),
 
        /* 0x28 */
@@ -198,7 +202,7 @@ static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = {
        TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
        TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
        TYPE(PERIPHC_SBC4,      CLOCK_TYPE_PCMT),
-       TYPE(PERIPHC_I2C3,      CLOCK_TYPE_PCMT),
+       TYPE(PERIPHC_I2C3,      CLOCK_TYPE_PCMT16),
        TYPE(PERIPHC_SDMMC3,    CLOCK_TYPE_PCMT),
 
        /* 0x30 */
@@ -211,13 +215,13 @@ static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = {
        TYPE(PERIPHC_I2S0,      CLOCK_TYPE_AXPT),
        TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
 
-       /* 0x38h */
+       /* 0x38h */             /* Jumps to reg offset 0x3B0h - new for T30 */
        TYPE(PERIPHC_G3D2,      CLOCK_TYPE_MCPA),
        TYPE(PERIPHC_MSELECT,   CLOCK_TYPE_PCMT),
-       TYPE(PERIPHC_TSENSOR,   CLOCK_TYPE_PCM),
+       TYPE(PERIPHC_TSENSOR,   CLOCK_TYPE_PCST),       /* s/b PCTS */
        TYPE(PERIPHC_I2S3,      CLOCK_TYPE_AXPT),
        TYPE(PERIPHC_I2S4,      CLOCK_TYPE_AXPT),
-       TYPE(PERIPHC_I2C4,      CLOCK_TYPE_PCMT),
+       TYPE(PERIPHC_I2C4,      CLOCK_TYPE_PCMT16),
        TYPE(PERIPHC_SBC5,      CLOCK_TYPE_PCMT),
        TYPE(PERIPHC_SBC6,      CLOCK_TYPE_PCMT),
 
@@ -228,21 +232,25 @@ static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = {
        TYPE(PERIPHC_DAM1,      CLOCK_TYPE_ACPT),
        TYPE(PERIPHC_DAM2,      CLOCK_TYPE_ACPT),
        TYPE(PERIPHC_HDA2CODEC2X, CLOCK_TYPE_PCMT),
-       TYPE(PERIPHC_ACTMON,    CLOCK_TYPE_PCM),
+       TYPE(PERIPHC_ACTMON,    CLOCK_TYPE_PCST),       /* MASK 31:30 */
        TYPE(PERIPHC_EXTPERIPH1, CLOCK_TYPE_ASPTE),
 
        /* 0x48 */
        TYPE(PERIPHC_EXTPERIPH2, CLOCK_TYPE_ASPTE),
        TYPE(PERIPHC_EXTPERIPH3, CLOCK_TYPE_ASPTE),
        TYPE(PERIPHC_NANDSPEED, CLOCK_TYPE_PCMT),
-       TYPE(PERIPHC_I2CSLOW,   CLOCK_TYPE_PCMT),
+       TYPE(PERIPHC_I2CSLOW,   CLOCK_TYPE_PCST),       /* MASK 31:30 */
        TYPE(PERIPHC_SYS,       CLOCK_TYPE_NONE),
        TYPE(PERIPHC_SPEEDO,    CLOCK_TYPE_PCMT),
        TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
        TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
 
        /* 0x50 */
-       TYPE(PERIPHC_SATAOOB,   CLOCK_TYPE_PCMT),
+       TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
+       TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
+       TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
+       TYPE(PERIPHC_NONE,      CLOCK_TYPE_NONE),
+       TYPE(PERIPHC_SATAOOB,   CLOCK_TYPE_PCMT),       /* offset 0x420h */
        TYPE(PERIPHC_SATA,      CLOCK_TYPE_PCMT),
        TYPE(PERIPHC_HDA,       CLOCK_TYPE_PCMT),
 };
@@ -693,6 +701,11 @@ static int get_periph_clock_source(enum periph_id periph_id,
 
        *mux_bits = clock_source[type][CLOCK_MAX_MUX];
 
+       if (type == CLOCK_TYPE_PCMT16)
+               *divider_bits = 16;
+       else
+               *divider_bits = 8;
+
        for (mux = 0; mux < CLOCK_MAX_MUX; mux++)
                if (clock_source[type][mux] == parent)
                        return mux;
@@ -983,35 +996,32 @@ void clock_ll_start_uart(enum periph_id periph_id)
  * the same but we are very cautious so we check that a valid clock ID is
  * provided.
  *
- * @param clk_id       Clock ID according to tegra20 device tree binding
+ * @param clk_id       Clock ID according to tegra30 device tree binding
  * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
  */
 static enum periph_id clk_id_to_periph_id(int clk_id)
 {
-       if (clk_id > 95)
+       if (clk_id > PERIPH_ID_COUNT)
                return PERIPH_ID_NONE;
 
        switch (clk_id) {
-       case 1:
-       case 2:
-       case 7:
-       case 10:
-       case 20:
-       case 30:
-       case 35:
-       case 49:
-       case 56:
-       case 74:
-       case 76:
-       case 77:
-       case 78:
-       case 79:
-       case 80:
-       case 81:
-       case 82:
-       case 83:
-       case 91:
-       case 95:
+       case PERIPH_ID_RESERVED3:
+       case PERIPH_ID_RESERVED4:
+       case PERIPH_ID_RESERVED16:
+       case PERIPH_ID_RESERVED24:
+       case PERIPH_ID_RESERVED35:
+       case PERIPH_ID_RESERVED43:
+       case PERIPH_ID_RESERVED45:
+       case PERIPH_ID_RESERVED56:
+       case PERIPH_ID_RESERVED76:
+       case PERIPH_ID_RESERVED77:
+       case PERIPH_ID_RESERVED78:
+       case PERIPH_ID_RESERVED83:
+       case PERIPH_ID_RESERVED89:
+       case PERIPH_ID_RESERVED91:
+       case PERIPH_ID_RESERVED93:
+       case PERIPH_ID_RESERVED94:
+       case PERIPH_ID_RESERVED95:
                return PERIPH_ID_NONE;
        default:
                return clk_id;
index b55e09d241f50cdff7a43f58936960ca7e3ab354..cb619f1f2d61551a8b5b24d0a0949ea1eb60d2a6 100644 (file)
@@ -351,6 +351,10 @@ enum periphc_internal_id {
        PERIPHC_4fh,
 
        /* 0x50 */
+       PERIPHC_50h,
+       PERIPHC_51h,
+       PERIPHC_52h,
+       PERIPHC_53h,
        PERIPHC_SATAOOB,
        PERIPHC_SATA,
        PERIPHC_HDA,