Remove unneeded variables and assignments.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Reviewed-by: Angelo Dureghello <angelo@sysam.it>
*/
ulong get_tbclk (void)
{
- ulong tbclk;
-
- tbclk = CONFIG_SYS_HZ;
-
- return tbclk;
+ return CONFIG_SYS_HZ;
}
/*
*/
u32 get_sysboot_value(void)
{
- int mode;
- mode = readl(&cstat->statusreg) & (SYSBOOT_MASK);
- return mode;
+ return readl(&cstat->statusreg) & SYSBOOT_MASK;
}
#ifdef CONFIG_DISPLAY_CPUINFO
*/
ulong get_tbclk (void)
{
- ulong tbclk;
-
- tbclk = CONFIG_SYS_HZ;
- return tbclk;
+ return CONFIG_SYS_HZ;
}
unsigned int zynq_get_silicon_version(void)
{
- unsigned int ver;
-
- ver = (readl(&devcfg_base->mctrl) &
- ZYNQ_SILICON_VER_MASK) >> ZYNQ_SILICON_VER_SHIFT;
-
- return ver;
+ return (readl(&devcfg_base->mctrl) & ZYNQ_SILICON_VER_MASK)
+ >> ZYNQ_SILICON_VER_SHIFT;
}
void reset_cpu(ulong addr)
*/
ulong get_tbclk(void)
{
- ulong tbclk;
-
- tbclk = CONFIG_SYS_HZ;
- return tbclk;
+ return CONFIG_SYS_HZ;
}
void enable_interrupts(void)
*/
ulong get_tbclk(void)
{
- ulong tbclk;
- tbclk = CONFIG_SYS_HZ;
- return tbclk;
+ return CONFIG_SYS_HZ;
}
*/
unsigned long get_tbclk (void)
{
- ulong tbclk;
-
- tbclk = (gd->bus_clk + 3L) / 4L;
-
- return tbclk;
+ return (gd->bus_clk + 3L) / 4L;
}
unsigned long get_tbclk(void)
{
- ulong tbclk;
-
- tbclk = (gd->bus_clk + 3L) / 4L;
-
- return tbclk;
+ return (gd->bus_clk + 3L) / 4L;
}
*/
ulong get_tbclk(void)
{
- ulong tbclk;
-
- tbclk = CONFIG_SYS_HZ;
- return tbclk;
+ return CONFIG_SYS_HZ;
}
#if XCHAL_HAVE_CCOUNT
phys_size_t initdram (int board_type)
{
- long dram_size;
-
- dram_size = spd_sdram();
-
- return dram_size;
+ return spd_sdram();
}
/*----------------------------------------------------------------------------+
------------------------------------------------------------------------- */
phys_size_t initdram(int board_type)
{
- long int ret;
-
- ret = spd_sdram();
- return ret;
+ return spd_sdram();
}
*/
static inline int board_fpga_read(int offset)
{
- int data;
-
- data = in_8((void *)(CONFIG_SYS_FPGA_BASE + offset));
-
- return data;
+ return in_8((void *)(CONFIG_SYS_FPGA_BASE + offset));
}
static inline void board_fpga_write(int offset, int data)
if (argc == 3) {
ulong dev_addr = simple_strtoul(argv[2], NULL, 16);
- if (strcmp(argv[1], "read") == 0) {
- int rcode;
-
- rcode = tricorder_eeprom_read(dev_addr);
-
- return rcode;
- }
+ if (strcmp(argv[1], "read") == 0)
+ return tricorder_eeprom_read(dev_addr);
} else if (argc == 6 || argc == 7) {
ulong dev_addr = simple_strtoul(argv[2], NULL, 16);
char *name = argv[3];
if (argc == 7)
interface = argv[6];
- if (strcmp(argv[1], "write") == 0) {
- int rcode;
-
- rcode = tricorder_eeprom_write(dev_addr, name, version,
- serial, interface);
-
- return rcode;
- }
+ if (strcmp(argv[1], "write") == 0)
+ return tricorder_eeprom_write(dev_addr, name, version,
+ serial, interface);
}
return CMD_RET_USAGE;
/* Uses the DPM command RRP */
u8 zm_read(uchar reg)
{
- u8 d;
- d = dpm_rrp(reg);
- return d;
+ return dpm_rrp(reg);
}
/* ZM_write --
int power_init_board(void)
{
- int ret;
-
/*
* For PMIC the I2C bus is named as I2C5, but it is connected
* to logical I2C adapter 0
*/
- ret = pmic_init(I2C_0);
- if (ret)
- return ret;
-
- return 0;
+ return pmic_init(I2C_0);
}
int dram_init(void)
int ehci_hcd_stop(void)
{
- int ret;
-
- ret = omap_ehci_hcd_stop();
- return ret;
+ return omap_ehci_hcd_stop();
}
void usb_hub_reset_devices(int port)