* MA 02111-1307 USA
*/
#include <common.h>
+#include <i2c.h>
#include <asm/omap_common.h>
#include <asm/gpio.h>
#include <asm/arch/clock.h>
u32 offset = volt_mv;
int ret = 0;
+ if (!volt_mv)
+ return;
+
pmic->pmic_bus_init();
/* See if we can first get the GPIO if needed */
if (pmic->gpio_en)
do_scale_vcore(vcores->mm.addr, vcores->mm.value,
vcores->mm.pmic);
+ do_scale_vcore(vcores->gpu.addr, vcores->gpu.value,
+ vcores->gpu.pmic);
+
+ do_scale_vcore(vcores->eve.addr, vcores->eve.value,
+ vcores->eve.pmic);
+
+ do_scale_vcore(vcores->iva.addr, vcores->iva.value,
+ vcores->iva.pmic);
+
if (emif_sdram_type() == EMIF_SDRAM_TYPE_DDR3) {
/* Configure LDO SRAM "magic" bits */
writel(2, (*prcm)->prm_sldo_core_setup);
if (OMAP_INIT_CONTEXT_SPL != omap_hw_init_context())
enable_basic_uboot_clocks();
}
+
+void gpi2c_init(void)
+{
+ static int gpi2c = 1;
+
+ if (gpi2c) {
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ gpi2c = 0;
+ }
+}
* MA 02111-1307 USA
*/
#include <common.h>
+#include <palmas.h>
#include <asm/arch/omap.h>
#include <asm/arch/sys_proto.h>
#include <asm/omap_common.h>
.pmic_write = omap_vc_bypass_send_value,
};
+struct pmic_data tps659038 = {
+ .base_offset = PALMAS_SMPS_BASE_VOLT_UV,
+ .step = 10000, /* 10 mV represented in uV */
+ /*
+ * Offset codes 1-6 all give the base voltage in Palmas
+ * Offset code 0 switches OFF the SMPS
+ */
+ .start_code = 6,
+ .i2c_slave_addr = TPS659038_I2C_SLAVE_ADDR,
+ .pmic_bus_init = gpi2c_init,
+ .pmic_write = palmas_i2c_write_u8,
+};
+
struct vcores_data omap5430_volts = {
.mpu.value = VDD_MPU,
.mpu.addr = SMPS_REG_ADDR_12_MPU,
.mm.pmic = &palmas,
};
+struct vcores_data dra752_volts = {
+ .mpu.value = VDD_MPU_DRA752,
+ .mpu.addr = TPS659038_REG_ADDR_SMPS12_MPU,
+ .mpu.pmic = &tps659038,
+
+ .eve.value = VDD_EVE_DRA752,
+ .eve.addr = TPS659038_REG_ADDR_SMPS45_EVE,
+ .eve.pmic = &tps659038,
+
+ .gpu.value = VDD_GPU_DRA752,
+ .gpu.addr = TPS659038_REG_ADDR_SMPS6_GPU,
+ .gpu.pmic = &tps659038,
+
+ .core.value = VDD_CORE_DRA752,
+ .core.addr = TPS659038_REG_ADDR_SMPS7_CORE,
+ .core.pmic = &tps659038,
+
+ .iva.value = VDD_IVA_DRA752,
+ .iva.addr = TPS659038_REG_ADDR_SMPS8_IVA,
+ .iva.pmic = &tps659038,
+};
+
/*
* Enable essential clock domains, modules and
* do some additional special settings needed
case DRA752_ES1_0:
*prcm = &dra7xx_prcm;
*dplls_data = &dra7xx_dplls;
- *omap_vcores = &omap5430_volts_es2;
+ *omap_vcores = &dra752_volts;
*ctrl = &dra7xx_ctrl;
break;
#define VDD_MPU_ES2_LOW 880
#define VDD_MM_ES2_LOW 880
+/* TPS659038 Voltage settings in mv for OPP_NOMINAL */
+#define VDD_MPU_DRA752 1090
+#define VDD_EVE_DRA752 1060
+#define VDD_GPU_DRA752 1060
+#define VDD_CORE_DRA752 1030
+#define VDD_IVA_DRA752 1060
+
/* Standard offset is 0.5v expressed in uv */
#define PALMAS_SMPS_BASE_VOLT_UV 500000
+/* TPS659038 */
+#define TPS659038_I2C_SLAVE_ADDR 0x58
+#define TPS659038_REG_ADDR_SMPS12_MPU 0x23
+#define TPS659038_REG_ADDR_SMPS45_EVE 0x2B
+#define TPS659038_REG_ADDR_SMPS6_GPU 0x2F
+#define TPS659038_REG_ADDR_SMPS7_CORE 0x33
+#define TPS659038_REG_ADDR_SMPS8_IVA 0x37
+
/* TPS */
#define TPS62361_I2C_SLAVE_ADDR 0x60
#define TPS62361_REG_ADDR_SET0 0x0