unsigned long tipg, tarc;
        uint32_t ipgr1, ipgr2;
 
-       E1000_WRITE_REG(hw, TDBAL, (unsigned long)tx_base);
-       E1000_WRITE_REG(hw, TDBAH, 0);
+       E1000_WRITE_REG(hw, TDBAL, (unsigned long)tx_base & 0xffffffff);
+       E1000_WRITE_REG(hw, TDBAH, (unsigned long)tx_base >> 32);
 
        E1000_WRITE_REG(hw, TDLEN, 128);
 
                E1000_WRITE_FLUSH(hw);
        }
        /* Setup the Base and Length of the Rx Descriptor Ring */
-       E1000_WRITE_REG(hw, RDBAL, (unsigned long)rx_base);
-       E1000_WRITE_REG(hw, RDBAH, 0);
+       E1000_WRITE_REG(hw, RDBAL, (unsigned long)rx_base & 0xffffffff);
+       E1000_WRITE_REG(hw, RDBAH, (unsigned long)rx_base >> 32);
 
        E1000_WRITE_REG(hw, RDLEN, 128);