};
};
+ ram {
+ compatible = "sandbox,ram";
+ };
+
reset@0 {
compatible = "sandbox,warm-reset";
};
CONFIG_UT_ENV=y
CONFIG_CLK=y
CONFIG_RESET=y
+CONFIG_RAM=y
# SPDX-License-Identifier: GPL-2.0+
#
obj-$(CONFIG_RAM) += ram-uclass.o
+obj-$(CONFIG_SANDBOX) += sandbox_ram.o
--- /dev/null
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <ram.h>
+#include <asm/test.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int sandbox_get_info(struct udevice *dev, struct ram_info *info)
+{
+ info->base = 0;
+ info->size = gd->ram_size;
+
+ return 0;
+}
+
+static const struct ram_ops sandbox_ram_ops = {
+ .get_info = sandbox_get_info,
+};
+
+static const struct udevice_id sandbox_ram_ids[] = {
+ { .compatible = "sandbox,ram" },
+ { }
+};
+
+U_BOOT_DRIVER(warm_ram_sandbox) = {
+ .name = "ram_sandbox",
+ .id = UCLASS_RAM,
+ .of_match = sandbox_ram_ids,
+ .ops = &sandbox_ram_ops,
+};
obj-$(CONFIG_DM_GPIO) += gpio.o
obj-$(CONFIG_DM_I2C) += i2c.o
obj-$(CONFIG_DM_PCI) += pci.o
+obj-$(CONFIG_RAM) += ram.o
obj-$(CONFIG_RESET) += reset.o
obj-$(CONFIG_DM_RTC) += rtc.o
obj-$(CONFIG_DM_SPI_FLASH) += sf.o
--- /dev/null
+/*
+ * Copyright (C) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <dm/test.h>
+#include <test/ut.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Basic test of the ram uclass */
+static int dm_test_ram_base(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+ struct ram_info info;
+
+ ut_assertok(uclass_get_device(UCLASS_RAM, 0, &dev));
+ ut_assertok(ram_get_info(dev, &info));
+ ut_asserteq(0, info.base);
+ ut_asserteq(gd->ram_size, info.size);
+
+ return 0;
+}
+DM_TEST(dm_test_ram_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);