ppc/85xx: Make L2 support more robust

According the user manual, we need loop-check the L2 enable bit set.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 53369349d13a3d19fd2adc83ee58c4941b69e77a..0041a60df967c0c51ee97c004a038a50e6ad9238 100644 (file)
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -360,8 +360,11 @@ int cpu_init_r(void)
        /* enable the cache */
        mtspr(SPRN_L2CSR0, CONFIG_SYS_INIT_L2CSR0);
 
-       if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E)
+       if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E) {
+               while (!(mfspr(SPRN_L2CSR0) & L2CSR0_L2E))
+                       ;
                printf("%d KB enabled\n", (l2cfg0 & 0x3fff) * 64);
+       }
 #else
        puts("disabled\n");
 #endif