]> git.sur5r.net Git - u-boot/commitdiff
davinci: remove macro CONFIG_DISPLAY_CPUINFO
authorHadli, Manjunath <manjunath.hadli@ti.com>
Mon, 6 Feb 2012 00:30:43 +0000 (00:30 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sun, 12 Feb 2012 09:11:32 +0000 (10:11 +0100)
remove the macro CONFIG_DISPLAY_CPUINFO as it is no longer
required. This is because clock info will be printed as part
'bdinfo' command and also remove support print_cpuinfo() as it will
no longer be called.

Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Cc: Tom Rini <trini@ti.com>
arch/arm/cpu/arm926ejs/davinci/cpu.c
include/configs/cam_enc_4xx.h
include/configs/davinci_dm355evm.h
include/configs/davinci_dm355leopard.h
include/configs/davinci_dm6467Tevm.h
include/configs/davinci_dm6467evm.h
include/configs/davinci_dvevm.h
include/configs/davinci_schmoogie.h
include/configs/davinci_sffsdr.h
include/configs/davinci_sonata.h
include/configs/enbw_cmc.h

index 9ea97853c7652ff6178b404326ac81b041843a33..17355552267d7e88b16b6a146bcb7ec62100c8eb 100644 (file)
@@ -115,21 +115,8 @@ int clk_get(enum davinci_clk_ids id)
 out:
        return pll_out;
 }
-#ifdef CONFIG_DISPLAY_CPUINFO
-int print_cpuinfo(void)
-{
-       printf("Cores: ARM %d MHz",
-                       clk_get(DAVINCI_ARM_CLKID) / 1000000);
-       printf("\nDDR:   %d MHz\n",
-                       /* DDR PHY uses an x2 input clock */
-                       clk_get(0x10001) / 1000000);
-       return 0;
-}
-#endif
 #else /* CONFIG_SOC_DA8XX */
 
-#ifdef CONFIG_DISPLAY_CPUINFO
-
 static unsigned pll_div(volatile void *pllbase, unsigned offset)
 {
        u32     div;
@@ -185,36 +172,6 @@ static unsigned pll_sysclk_mhz(unsigned pll_addr, unsigned div)
        return DIV_ROUND_UP(base, 1000 * pll_div(pllbase, div));
 }
 
-int print_cpuinfo(void)
-{
-       /* REVISIT fetch and display CPU ID and revision information
-        * too ... that will matter as more revisions appear.
-        */
-#if defined(CONFIG_SOC_DM365)
-       printf("Cores: ARM %d MHz",
-                       pll_sysclk_mhz(DAVINCI_PLL_CNTRL1_BASE, ARM_PLLDIV));
-#else
-       printf("Cores: ARM %d MHz",
-                       pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, ARM_PLLDIV));
-#endif
-
-#ifdef DSP_PLLDIV
-       printf(", DSP %d MHz",
-                       pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, DSP_PLLDIV));
-#endif
-
-       printf("\nDDR:   %d MHz\n",
-                       /* DDR PHY uses an x2 input clock */
-#if defined(CONFIG_SOC_DM365)
-                       pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, DDR_PLLDIV)
-                               / 2);
-#else
-                       pll_sysclk_mhz(DAVINCI_PLL_CNTRL1_BASE, DDR_PLLDIV)
-                               / 2);
-#endif
-       return 0;
-}
-
 #ifdef DAVINCI_DM6467EVM
 unsigned int davinci_arm_clk_get()
 {
@@ -228,7 +185,6 @@ unsigned int davinci_clk_get(unsigned int div)
        return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, div) * 1000000;
 }
 #endif
-#endif /* CONFIG_DISPLAY_CPUINFO */
 #endif /* !CONFIG_SOC_DA8XX */
 
 /*
index 14368dfe6d59debb5a33d75d02c7bc8c70321282..bca9841a171a88d0ef38d7a912090c50aaecceb4 100644 (file)
 #define CONFIG_POST    CONFIG_SYS_POST_MEMORY
 #define _POST_WORD_ADDR        0x0
 
-#define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
 #define CONFIG_SYS_INIT_SP_ADDR                CONFIG_SPL_STACK
index ddf673c846d9e108235d562c227c2e7cffbe964d..8578730baba58f007f2b905b412bc4c09f8fc2a0 100644 (file)
@@ -26,7 +26,6 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT      /* U-Boot is a 3rd stage loader */
 #define CONFIG_SYS_NO_FLASH            /* that is, no *NOR* flash */
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
-#define CONFIG_DISPLAY_CPUINFO
 
 /* SoC Configuration */
 #define CONFIG_ARM926EJS                               /* arm926ejs CPU */
index dc5b408a618e542797694ba03f35993813f7dbf9..803e8578fcf02cb9292615cecf2167e8a300e20f 100644 (file)
@@ -25,7 +25,6 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT      /* U-Boot is a 3rd stage loader */
 #define CONFIG_SYS_NO_FLASH            /* that is, no *NOR* flash */
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
-#define CONFIG_DISPLAY_CPUINFO
 
 /* SoC Configuration */
 #define CONFIG_ARM926EJS                               /* arm926ejs CPU */
index b3a4e4434420e177516de39ce55f68c91176f278..f7c994eba94c8336e28ce5861a5e90123f6c38f1 100644 (file)
@@ -23,7 +23,6 @@
 /* Spectrum Digital TMS320DM6467T EVM board */
 #define DAVINCI_DM6467EVM
 #define DAVINCI_DM6467TEVM
-#define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_SYS_USE_NAND
 #define CONFIG_SYS_NAND_SMALLPAGE
 
index c9a0cd1daa3234ed916fe3bcb7274a0130e45287..ddfd3ed39b09afcf4f6b82488e48b3fbfa0b780a 100644 (file)
@@ -22,7 +22,6 @@
 
 /* Spectrum Digital TMS320DM6467 EVM board */
 #define DAVINCI_DM6467EVM
-#define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_SYS_USE_NAND
 #define CONFIG_SYS_NAND_SMALLPAGE
 
index c0525173e6806841e91108eab4fb526eaa33b2f5..a2aa3c3fce0101ac70d4a78df30558124d81c96d 100644 (file)
@@ -51,7 +51,6 @@
 #define DV_EVM
 #define CONFIG_SYS_NAND_SMALLPAGE
 #define CONFIG_SYS_USE_NAND
-#define CONFIG_DISPLAY_CPUINFO
 /*===================*/
 /* SoC Configuration */
 /*===================*/
index f4ddbeacc3b00038807707f699c6492e15e69aff..e0a8ee9a9597ae3031618930ecbd9995ee31e8ef 100644 (file)
@@ -26,7 +26,6 @@
 #define SCHMOOGIE
 #define CONFIG_SYS_NAND_LARGEPAGE
 #define CONFIG_SYS_USE_NAND
-#define CONFIG_DISPLAY_CPUINFO
 #define MACH_TYPE_SCHMOOGIE 1255
 #define CONFIG_MACH_TYPE MACH_TYPE_SCHMOOGIE
 
index 0c653915bdf83d95e76fff1a4c2c1a1441603720..a2da65a762b87a8f9d158611dfdeea60c97e1d7a 100644 (file)
@@ -28,7 +28,6 @@
 #define CONFIG_SYS_NAND_LARGEPAGE
 #define CONFIG_SYS_USE_NAND
 #define CONFIG_SYS_USE_DSPLINK         /* don't power up the DSP. */
-#define CONFIG_DISPLAY_CPUINFO
 /* SoC Configuration */
 #define CONFIG_ARM926EJS                       /* arm926ejs CPU core */
 #define CONFIG_SYS_TIMERBASE           0x01c21400      /* use timer 0 */
index fc4d8eceac388eaa8ded2a1595bdf35360fc4642..db4796624d40fe3d7cf144cd096328190054551b 100644 (file)
@@ -51,7 +51,6 @@
 #define SONATA_BOARD
 #define CONFIG_SYS_NAND_SMALLPAGE
 #define CONFIG_SYS_USE_NOR
-#define CONFIG_DISPLAY_CPUINFO
 #define MACH_TYPE_SONATA 1254
 #define CONFIG_MACH_TYPE MACH_TYPE_SONATA
 /*===================*/
index 01390b1dbdc1b23f0666e9a8ab40638694ba1fc9..9cffaee1108cd524831a761ca99ef443a42a40fd 100644 (file)
@@ -50,7 +50,6 @@
 #define CONFIG_ARCH_CPU_INIT
 #define CONFIG_DA8XX_GPIO
 #define CONFIG_HOSTNAME                enbw_cmc
-#define CONFIG_DISPLAY_CPUINFO
 
 #define MACH_TYPE_ENBW_CMC     3585
 #define CONFIG_MACH_TYPE       MACH_TYPE_ENBW_CMC