Add memory and I2C posts to the XPedite517x/520x/537x board families.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
 #define CONFIG_SYS_ALT_MEMTEST
 #define CONFIG_SYS_MEMTEST_START       0x10000000
 #define CONFIG_SYS_MEMTEST_END         0x20000000
+#define CONFIG_POST                    (CONFIG_SYS_POST_MEMORY |\
+                                        CONFIG_SYS_POST_I2C)
+#define I2C_ADDR_LIST                  {CONFIG_SYS_I2C_DS1621_ADDR,    \
+                                        CONFIG_SYS_I2C_DS4510_ADDR,    \
+                                        CONFIG_SYS_I2C_EEPROM_ADDR,    \
+                                        CONFIG_SYS_I2C_LM90_ADDR,      \
+                                        CONFIG_SYS_I2C_PCA9553_ADDR,   \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR0,  \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR1,  \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR2,  \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR3,  \
+                                        CONFIG_SYS_I2C_PEX8518_ADDR,   \
+                                        CONFIG_SYS_I2C_RTC_ADDR}
+/* The XPedite5170 can host an XMC which has an EEPROM at address 0x50 */
+#define I2C_ADDR_IGNORE_LIST           {0x50}
 
 /*
  * Memory map
 #define CONFIG_SYS_I2C_DS1621_ADDR     0x48
 #define CONFIG_DTT_DS1621
 #define CONFIG_DTT_SENSORS             { 0 }
+#define CONFIG_SYS_I2C_LM90_ADDR       0x4c
 
 /* I2C EEPROM - AT24C128B */
 #define CONFIG_SYS_I2C_EEPROM_ADDR             0x54
 #define CONFIG_SYS_I2C_PCA953X_ADDR2   0x1e
 #define CONFIG_SYS_I2C_PCA953X_ADDR3   0x1f
 #define CONFIG_SYS_I2C_PCA953X_ADDR    CONFIG_SYS_I2C_PCA953X_ADDR0
+#define CONFIG_SYS_I2C_PCA9553_ADDR    0x62
 
 /*
  * PU = pulled high, PD = pulled low
 
 #define CONFIG_SYS_ALT_MEMTEST
 #define CONFIG_SYS_MEMTEST_START       0x10000000
 #define CONFIG_SYS_MEMTEST_END         0x20000000
+#define CONFIG_POST                    (CONFIG_SYS_POST_MEMORY | \
+                                        CONFIG_SYS_POST_I2C)
+#define I2C_ADDR_LIST                  {CONFIG_SYS_I2C_MAX1237_ADDR,   \
+                                        CONFIG_SYS_I2C_EEPROM_ADDR,    \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR0,  \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR1,  \
+                                        CONFIG_SYS_I2C_RTC_ADDR}
 
 /*
  * Memory map
 #define CONFIG_SYS_PCA953X_P14_IO6             0x40
 #define CONFIG_SYS_PCA953X_P14_IO7             0x80
 
+/* 12-bit ADC used to measure CPU diode */
+#define CONFIG_SYS_I2C_MAX1237_ADDR            0x34
+
 /*
  * General PCI
  * Memory space is mapped 1-1, but I/O space must start from 0.
 
 #define CONFIG_SYS_ALT_MEMTEST
 #define CONFIG_SYS_MEMTEST_START       0x10000000
 #define CONFIG_SYS_MEMTEST_END         0x20000000
+#define CONFIG_POST                    (CONFIG_SYS_POST_MEMORY | \
+                                        CONFIG_SYS_POST_I2C)
+#define I2C_ADDR_LIST                  {CONFIG_SYS_I2C_DS1621_ADDR,    \
+                                        CONFIG_SYS_I2C_DS4510_ADDR,    \
+                                        CONFIG_SYS_I2C_EEPROM_ADDR,    \
+                                        CONFIG_SYS_I2C_LM90_ADDR,      \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR0,  \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR1,  \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR2,  \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR3,  \
+                                        CONFIG_SYS_I2C_PEX8518_ADDR,   \
+                                        CONFIG_SYS_I2C_RTC_ADDR}
+/* The XPedite5370 can host an XMC which has an EEPROM at address 0x50 */
+#define I2C_ADDR_IGNORE_LIST           {0x50}
 
 /*
  * Memory map
 #define CONFIG_SYS_I2C_DS1621_ADDR     0x48
 #define CONFIG_DTT_DS1621
 #define CONFIG_DTT_SENSORS             { 0 }
+#define CONFIG_SYS_I2C_LM90_ADDR       0x4c
 
 /* I2C EEPROM - AT24C128B */
 #define CONFIG_SYS_I2C_EEPROM_ADDR             0x54