]> git.sur5r.net Git - u-boot/commitdiff
remove __attribute__ ((packed)) in at91 headers
authorJens Scharsig <js_at_ng@scharsoft.de>
Wed, 22 Dec 2010 01:16:47 +0000 (01:16 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Wed, 18 May 2011 05:56:52 +0000 (07:56 +0200)
* remove __attribute__ ((packed)) to prevent byte access
  to soc registers in some gcc version

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
arch/arm/include/asm/arch-at91/at91_mc.h
arch/arm/include/asm/arch-at91/at91_st.h
arch/arm/include/asm/arch-at91/at91_tc.h

index acfbd10c5ce72eea52fbb868e099d7ee57cba208..09453a94504c32ad913ea51fe6d29d79c3d3b178 100644 (file)
@@ -36,7 +36,7 @@ typedef struct at91_ebi {
        u32     csa;            /* 0x00 Chip Select Assignment Register */
        u32     cfgr;           /* 0x04 Configuration Register */
        u32     reserved[2];
-} __attribute__ ((packed)) at91_ebi_t;
+} at91_ebi_t;
 
 #define AT91_EBI_CSA_CS0A      0x0001
 #define AT91_EBI_CSA_CS1A      0x0002
@@ -55,11 +55,11 @@ typedef struct at91_sdramc {
        u32     imr;    /* 0x1C SDRAMC Interrupt Mask Register */
        u32     icr;    /* 0x20 SDRAMC Interrupt Status Register */
        u32     reserved[3];
-} __attribute__ ((packed)) at91_sdramc_t;
+} at91_sdramc_t;
 
 typedef struct at91_smc {
        u32     csr[8];         /* 0x00 SDRAMC Mode Register */
-} __attribute__ ((packed)) at91_smc_t;
+} at91_smc_t;
 
 #define AT91_SMC_CSR_RWHOLD(x)         ((x & 0x7) << 28)
 #define AT91_SMC_CSR_RWSETUP(x)                ((x & 0x7) << 24)
@@ -78,7 +78,7 @@ typedef struct at91_smc {
 
 typedef struct at91_bfc {
        u32     mr;     /* 0x00 SDRAMC Mode Register */
-} __attribute__ ((packed)) at91_bfc_t;
+} at91_bfc_t;
 
 typedef struct at91_mc {
        u32             rcr;            /* 0x00 MC Remap Control Register */
@@ -91,7 +91,7 @@ typedef struct at91_mc {
        at91_sdramc_t   sdramc;         /* 0x90 - 0xBC SDRAMC User Interface */
        at91_bfc_t      bfc;            /* 0xC0 BFC User Interface */
        u32             reserved2[15];
-} __attribute__ ((packed)) at91_mc_t;
+} at91_mc_t;
 
 #endif
 #endif
index 53f932085b9378d2c7461f1a414b7c9d0ca3a14b..98b0a7640b8ea1a96520dd9a64527763a42dcf47 100644 (file)
@@ -35,7 +35,7 @@ typedef struct at91_st {
        u32     imr;
        u32     rtar;
        u32     crtr;
-} __attribute__ ((packed)) at91_st_t ;
+} at91_st_t ;
 
 #define AT91_ST_CR_WDRST       1
 
index 1e180adb3c183fd1679a1e10468c4baa40c8a33c..1eae4e95c7ff744ee71067e3f217aebe3cc315fe 100644 (file)
@@ -36,7 +36,7 @@ typedef struct at91_tcc {
        u32             idr;    /* 0x28 Interrupt Disable Register */
        u32             imr;    /* 0x2C Interrupt Mask Register */
        u32             reserved3[4];
-} __attribute__ ((packed)) at91_tcc_t;
+} at91_tcc_t;
 
 #define AT91_TC_CCR_CLKEN              0x00000001
 #define AT91_TC_CCR_CLKDIS             0x00000002
@@ -57,7 +57,7 @@ typedef struct at91_tc {
        at91_tcc_t      tc[3];  /* 0x00 TC Channel 0-2 */
        u32             bcr;    /* 0xC0 TC Block Control Register */
        u32             bmr;    /* 0xC4 TC Block Mode Register */
-} __attribute__ ((packed)) at91_tc_t;
+} at91_tc_t;
 
 #define AT91_TC_BMR_TC0XC0S_TCLK0      0x00000000
 #define AT91_TC_BMR_TC0XC0S_NONE       0x00000001