]> git.sur5r.net Git - u-boot/commitdiff
ppc: Move lbc_clk and cpu to arch_global_data
authorSimon Glass <sjg@chromium.org>
Thu, 13 Dec 2012 20:48:48 +0000 (20:48 +0000)
committerTom Rini <trini@ti.com>
Mon, 4 Feb 2013 14:04:57 +0000 (09:04 -0500)
Move these fields into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Update for bsc9132qds.c, b4860qds.c]
Signed-off-by: Tom Rini <trini@ti.com>
19 files changed:
arch/powerpc/cpu/mpc85xx/cpu.c
arch/powerpc/cpu/mpc85xx/fdt.c
arch/powerpc/cpu/mpc85xx/speed.c
arch/powerpc/cpu/mpc86xx/cpu.c
arch/powerpc/cpu/mpc86xx/fdt.c
arch/powerpc/cpu/mpc86xx/speed.c
arch/powerpc/cpu/mpc8xxx/cpu.c
arch/powerpc/include/asm/global_data.h
arch/powerpc/lib/board.c
board/freescale/b4860qds/b4860qds.c
board/freescale/bsc9131rdb/bsc9131rdb.c
board/freescale/bsc9132qds/bsc9132qds.c
board/freescale/corenet_ds/corenet_ds.c
board/freescale/p1010rdb/ddr.c
board/freescale/p1010rdb/p1010rdb.c
board/freescale/p1_p2_rdb/ddr.c
board/freescale/p1_p2_rdb/p1_p2_rdb.c
board/freescale/p2041rdb/p2041rdb.c
board/freescale/t4qds/t4qds.c

index 9b9832cfc3363b71d53893f85a7e90b8fbd46895..df2ab6d73cbd73a3872c5263233483f3a277da41 100644 (file)
@@ -104,7 +104,7 @@ int checkcpu (void)
                puts("CPU:   ");
        }
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
 
        puts(cpu->name);
        if (IS_E_PROCESSOR(svr))
index 3a268aa0a0b749182da7c76f582dc1f4bd85b90f..d381cf9da2aeb7c02ebd551f033aa2809425482b 100644 (file)
@@ -637,9 +637,9 @@ void ft_cpu_setup(void *blob, bd_t *bd)
                "bus-frequency", bd->bi_busfreq, 1);
 
        do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
-               "bus-frequency", gd->lbc_clk, 1);
+               "bus-frequency", gd->arch.lbc_clk, 1);
        do_fixup_by_compat_u32(blob, "fsl,elbc",
-               "bus-frequency", gd->lbc_clk, 1);
+               "bus-frequency", gd->arch.lbc_clk, 1);
 #ifdef CONFIG_QE
        ft_qe_setup(blob);
        ft_fixup_qe_snum(blob);
index c4ca481059b75004fea1f8ce88e65d7c423f1e10..f3132fbd3666db59a3a3720ae885cb0460d7ad86 100644 (file)
@@ -391,7 +391,7 @@ int get_clocks (void)
        gd->cpu_clk = sys_info.freqProcessor[0];
        gd->bus_clk = sys_info.freqSystemBus;
        gd->mem_clk = sys_info.freqDDRBus;
-       gd->lbc_clk = sys_info.freqLocalBus;
+       gd->arch.lbc_clk = sys_info.freqLocalBus;
 
 #ifdef CONFIG_QE
        gd->qe_clk = sys_info.freqQE;
index d2c8c78e864b279d88cc9b86e0fbb153b329141d..c553415b555a5a122b5f4966d97c9915ad2efc1e 100644 (file)
@@ -67,7 +67,7 @@ checkcpu(void)
        }
        puts("CPU:   ");
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
 
        puts(cpu->name);
 
index 2f955fe9309220fcc8af6b6803b30e2624bed76b..26a65c586d5da49ca1f3437594e2ee9a7489f7d2 100644 (file)
@@ -34,10 +34,10 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 
 #if defined(CONFIG_MPC8641)
        do_fixup_by_compat_u32(blob, "fsl,mpc8641-localbus",
-                              "bus-frequency", gd->lbc_clk, 1);
+                              "bus-frequency", gd->arch.lbc_clk, 1);
 #endif
        do_fixup_by_compat_u32(blob, "fsl,elbc",
-                              "bus-frequency", gd->lbc_clk, 1);
+                              "bus-frequency", gd->arch.lbc_clk, 1);
 
        fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
 
index a2d0a8ac6ebdf6f75b3661e002318e4ba0651c4c..e5798eebec6ea9511284c7be2a83c6f016229357 100644 (file)
@@ -120,7 +120,7 @@ int get_clocks(void)
        get_sys_info(&sys_info);
        gd->cpu_clk = sys_info.freqProcessor;
        gd->bus_clk = sys_info.freqSystemBus;
-       gd->lbc_clk = sys_info.freqLocalBus;
+       gd->arch.lbc_clk = sys_info.freqLocalBus;
 
        /*
         * The base clock for I2C depends on the actual SOC.  Unfortunately,
index ab454f50dbd9a5f9a669929cdb8ee7a01370e289..39525fb29d55ed6163a2c748b594a7160b959117 100644 (file)
@@ -148,7 +148,7 @@ struct cpu_type *identify_cpu(u32 ver)
 u32 cpu_mask(void)
 {
        ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
-       struct cpu_type *cpu = gd->cpu;
+       struct cpu_type *cpu = gd->arch.cpu;
 
        /* better to query feature reporting register than just assume 1 */
        if (cpu == &cpu_type_unknown)
@@ -166,7 +166,7 @@ u32 cpu_mask(void)
  */
 int cpu_numcores(void)
 {
-       struct cpu_type *cpu = gd->cpu;
+       struct cpu_type *cpu = gd->arch.cpu;
 
        /*
         * Report # of cores in terms of the cpu_mask if we haven't
@@ -196,7 +196,7 @@ int probecpu (void)
        svr = get_svr();
        ver = SVR_SOC_VER(svr);
 
-       gd->cpu = identify_cpu(ver);
+       gd->arch.cpu = identify_cpu(ver);
 
        return 0;
 }
@@ -204,7 +204,7 @@ int probecpu (void)
 /* Once in memory, compute mask & # cores once and save them off */
 int fixup_cpu(void)
 {
-       struct cpu_type *cpu = gd->cpu;
+       struct cpu_type *cpu = gd->arch.cpu;
 
        if (cpu->num_cores == 0) {
                cpu->mask = cpu_mask();
index b7bb035bae1518d1f6805be0318795d070c3ed01..d924673c18b2b6a4e4755e9fb5608f9e900aec3b 100644 (file)
@@ -76,6 +76,10 @@ struct arch_global_data {
        u32 mem_sec_clk;
 # endif /* CONFIG_MPC8360 */
 #endif
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
+       u32 lbc_clk;
+       void *cpu;
+#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
 };
 
 /*
@@ -98,10 +102,6 @@ typedef     struct  global_data {
 #if defined(CONFIG_FSL_ESDHC)
        u32 sdhc_clk;
 #endif
-#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
-       u32 lbc_clk;
-       void *cpu;
-#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
 #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
        u32 i2c1_clk;
        u32 i2c2_clk;
index 988039f33726182370fdddea051588228667d22d..22bd713d625a110ba47cd43a0066c33cd074f6e0 100644 (file)
@@ -649,10 +649,11 @@ void board_init_r(gd_t *id, ulong dest_addr)
 
 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
        /*
-        * The gd->cpu pointer is set to an address in flash before relocation.
-        * We need to update it to point to the same CPU entry in RAM.
+        * The gd->arch.cpu pointer is set to an address in flash before
+        * relocation.  We need to update it to point to the same CPU entry
+        * in RAM.
         */
-       gd->cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
+       gd->arch.cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
 
        /*
         * If we didn't know the cpu mask & # cores, we can save them of
index 3c470db9f696e313207796e4abf97875fa767667..41887c2c7a8ec7738ee29240d0a83b8d1617b821 100644 (file)
@@ -50,7 +50,7 @@ int checkboard(void)
 {
        char buf[64];
        u8 sw;
-       struct cpu_type *cpu = gd->cpu;
+       struct cpu_type *cpu = gd->arch.cpu;
        ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
        unsigned int i;
        static const char *const freq[] = {"100", "125", "156.25", "161.13",
index 2e0e55f47b6cfc5018f6247d377a0042d69e375c..fe870b64d202f975d5d1fa0c78ecd2af4bab67d1 100644 (file)
@@ -59,7 +59,7 @@ int checkboard(void)
 {
        struct cpu_type *cpu;
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
        printf("Board: %sRDB\n", cpu->name);
 
        return 0;
index bcac5c1ddb42dbeb7f7ec97f02720dbba43e2671..6e1b55816f21c21885ab48faf22d4d87eddd5520 100644 (file)
@@ -184,7 +184,7 @@ int checkboard(void)
        struct cpu_type *cpu;
        u8 sw;
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
        printf("Board: %sQDS\n", cpu->name);
 
        printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x,\n",
index 21428e3347633eeddaaedf6a7ee619144ea73449..48f7155faf4354f6633202a9bf29a744c09e3b0a 100644 (file)
@@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int checkboard (void)
 {
        u8 sw;
-       struct cpu_type *cpu = gd->cpu;
+       struct cpu_type *cpu = gd->arch.cpu;
        ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
        unsigned int i;
        static const char * const freq[] = {"100", "125", "156.25", "212.5" };
index 6d00caffa373e4369505f749cb6b3ce057b0f561..49310bdb149fbb0a86ff6cb1d53aa6db5f99ae91 100644 (file)
@@ -99,7 +99,7 @@ unsigned long get_sdram_size(void)
        struct cpu_type *cpu;
        phys_size_t ddr_size;
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
        /* P1014 and it's derivatives support max 16it DDR width */
        if (cpu->soc_ver == SVR_P1014)
                ddr_size = (CONFIG_SYS_DRAM_SIZE / 2);
@@ -144,7 +144,7 @@ phys_size_t fixed_sdram(void)
                panic("Unsupported DDR data rate %s MT/s data rate\n",
                                        strmhz(buf, ddr_freq));
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
        /* P1014 and it's derivatives support max 16bit DDR width */
        if (cpu->soc_ver == SVR_P1014) {
                ddr_cfg_regs.ddr_sdram_cfg &= ~SDRAM_CFG_DBW_MASK;
@@ -237,7 +237,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
        popts->trwt_override = 1;
        popts->trwt = 0;
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
        /* P1014 and it's derivatives support max 16it DDR width */
        if (cpu->soc_ver == SVR_P1014)
                popts->data_bus_width = DDR_DATA_BUS_WIDTH_16;
index dfeb86f63e6847f407caf2f12f51bebd69e7b41f..11e2e8ae4801b3151940f5f8b4812b8cd9747939 100644 (file)
@@ -164,7 +164,7 @@ int checkboard(void)
 {
        struct cpu_type *cpu;
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
        printf("Board: %sRDB\n", cpu->name);
 
        return 0;
@@ -178,7 +178,7 @@ int board_eth_init(bd_t *bis)
        struct cpu_type *cpu;
        int num = 0;
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
 
 #ifdef CONFIG_TSEC1
        SET_STD_TSEC_INFO(tsec_info[num], 1);
@@ -283,7 +283,7 @@ void ft_board_setup(void *blob, bd_t *bd)
        phys_size_t size;
        struct cpu_type *cpu;
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
 
        ft_cpu_setup(blob, bd);
 
index 916439c17f2afdb8300722fa4f17aeacee650b95..b16b8c8a902afd319e45fa9ca93b910ff7c4c4ef 100644 (file)
@@ -202,7 +202,7 @@ phys_size_t fixed_sdram (void)
        struct cpu_type *cpu;
        ulong ddr_freq, ddr_freq_mhz;
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
        /* P1020 and it's derivatives support max 32bit DDR width */
        if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1011) {
                ddr_size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 / 2);
index 437eaf0fdd6e0852aa791855abdebf8c138137df..9c6683d49288ee8a22e0fc2353944a6cbcb41d59 100644 (file)
@@ -108,7 +108,7 @@ int checkboard (void)
        else
                panic ("Unexpected Board REV %x detected!!\n", board_rev_gpio);
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
        printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev);
 
        setbits_be32(&pgpio->gpdir, GPIO_DIR);
index 4e4d18fe3595a5d3e0bb12d23cb093bb26edad41..a706a6d00ca6fd2ce6b5533442a6c8b3d38d5394 100644 (file)
@@ -43,7 +43,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int checkboard(void)
 {
        u8 sw;
-       struct cpu_type *cpu = gd->cpu;
+       struct cpu_type *cpu = gd->arch.cpu;
        ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
        unsigned int i;
 
index e81846f3f762a74159ec8fa2e92baf4b86d5cc5f..3c95f3fb7852dc2316fbacb53b9be170e81e679b 100644 (file)
@@ -58,7 +58,7 @@ int checkboard(void)
 {
        char buf[64];
        u8 sw;
-       struct cpu_type *cpu = gd->cpu;
+       struct cpu_type *cpu = gd->arch.cpu;
        ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
        unsigned int i;