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--- /dev/null
+/*\r
+ FreeRTOS V8.0.0:rc2 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * Thank you! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+ >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+ >>! a combined work that includes FreeRTOS without being obliged to provide\r
+ >>! the source code for proprietary components outside of the FreeRTOS\r
+ >>! kernel.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1: This project provides two demo applications. A simple blinky style\r
+ * project, and a more comprehensive test and demo application. The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
+ * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
+ * in main.c. This file implements the simply blinky style version.\r
+ *\r
+ * NOTE 2: This file only contains the source code that is specific to the\r
+ * basic demo. Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware are defined in main.c.\r
+ ******************************************************************************\r
+ *\r
+ * main_blinky() creates one queue, and two tasks. It then starts the\r
+ * scheduler.\r
+ *\r
+ * The Queue Send Task:\r
+ * The queue send task is implemented by the prvQueueSendTask() function in\r
+ * this file. prvQueueSendTask() sits in a loop that causes it to repeatedly\r
+ * block for 200 milliseconds, before sending the value 100 to the queue that\r
+ * was created within main_blinky(). Once the value is sent, the task loops\r
+ * back around to block for another 200 milliseconds...and so on.\r
+ *\r
+ * The Queue Receive Task:\r
+ * The queue receive task is implemented by the prvQueueReceiveTask() function\r
+ * in this file. prvQueueReceiveTask() sits in a loop where it repeatedly\r
+ * blocks on attempts to read data from the queue that was created within\r
+ * main_blinky(). When data is received, the task checks the value of the\r
+ * data, and if the value equals the expected 100, toggles an LED. The 'block\r
+ * time' parameter passed to the queue receive function specifies that the\r
+ * task should be held in the Blocked state indefinitely to wait for data to\r
+ * be available on the queue. The queue receive task will only leave the\r
+ * Blocked state when the queue send task writes to the queue. As the queue\r
+ * send task writes to the queue every 200 milliseconds, the queue receive\r
+ * task leaves the Blocked state every 200 milliseconds, and therefore toggles\r
+ * the LED every 200 milliseconds.\r
+ */\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "semphr.h"\r
+\r
+/* Standard demo includes. */\r
+#include "partest.h"\r
+\r
+/* Priorities at which the tasks are created. */\r
+#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
+#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
+\r
+/* The rate at which data is sent to the queue. The 200ms value is converted\r
+to ticks using the portTICK_RATE_MS constant. */\r
+#define mainQUEUE_SEND_FREQUENCY_MS ( 200 / portTICK_RATE_MS )\r
+\r
+/* The number of items the queue can hold. This is 1 as the receive task\r
+will remove items as they are added, meaning the send task should always find\r
+the queue empty. */\r
+#define mainQUEUE_LENGTH ( 1 )\r
+\r
+/* The LED toggled by the Rx task. */\r
+#define mainTASK_LED ( 0 )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The tasks as described in the comments at the top of this file.\r
+ */\r
+static void prvQueueReceiveTask( void *pvParameters );\r
+static void prvQueueSendTask( void *pvParameters );\r
+\r
+/*\r
+ * Called by main() to create the simply blinky style application if\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
+ */\r
+void main_blinky( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used by both tasks. */\r
+static xQueueHandle xQueue = NULL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_blinky( void )\r
+{\r
+ /* Create the queue. */\r
+ xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) );\r
+\r
+ if( xQueue != NULL )\r
+ {\r
+ /* Start the two tasks as described in the comments at the top of this\r
+ file. */\r
+ xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */\r
+ "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */\r
+ configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */\r
+ NULL, /* The parameter passed to the task - not used in this case. */\r
+ mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */\r
+ NULL ); /* The task handle is not required, so NULL is passed. */\r
+\r
+ xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL );\r
+\r
+ /* Start the tasks and timer running. */\r
+ vTaskStartScheduler();\r
+ }\r
+\r
+ /* If all is well, the scheduler will now be running, and the following\r
+ line will never be reached. If the following line does execute, then\r
+ there was either insufficient FreeRTOS heap memory available for the idle\r
+ and/or timer tasks to be created, or vTaskStartScheduler() was called from\r
+ User mode. See the memory management section on the FreeRTOS web site for\r
+ more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The\r
+ mode from which main() is called is set in the C start up code and must be\r
+ a privileged mode (not user mode). */\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvQueueSendTask( void *pvParameters )\r
+{\r
+portTickType xNextWakeTime;\r
+const unsigned long ulValueToSend = 100UL;\r
+\r
+ /* Remove compiler warning about unused parameter. */\r
+ ( void ) pvParameters;\r
+\r
+ /* Initialise xNextWakeTime - this only needs to be done once. */\r
+ xNextWakeTime = xTaskGetTickCount();\r
+\r
+ for( ;; )\r
+ {\r
+ /* Place this task in the blocked state until it is time to run again. */\r
+ vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );\r
+\r
+ /* Send to the queue - causing the queue receive task to unblock and\r
+ toggle the LED. 0 is used as the block time so the sending operation\r
+ will not block - it shouldn't need to block as the queue should always\r
+ be empty at this point in the code. */\r
+ xQueueSend( xQueue, &ulValueToSend, 0U );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvQueueReceiveTask( void *pvParameters )\r
+{\r
+unsigned long ulReceivedValue;\r
+const unsigned long ulExpectedValue = 100UL;\r
+\r
+ /* Remove compiler warning about unused parameter. */\r
+ ( void ) pvParameters;\r
+\r
+ for( ;; )\r
+ {\r
+ /* Wait until something arrives in the queue - this task will block\r
+ indefinitely provided INCLUDE_vTaskSuspend is set to 1 in\r
+ FreeRTOSConfig.h. */\r
+ xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );\r
+\r
+ /* To get here something must have been received from the queue, but\r
+ is it the expected value? If it is, toggle the LED. */\r
+ if( ulReceivedValue == ulExpectedValue )\r
+ {\r
+ vParTestToggleLED( mainTASK_LED );\r
+ ulReceivedValue = 0U;\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
#define configUSE_PREEMPTION 1\r
#define configUSE_IDLE_HOOK 1\r
#define configUSE_TICK_HOOK 1\r
-#define configMAX_PRIORITIES ( 5 )\r
+#define configMAX_PRIORITIES ( 7 )\r
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 160 )\r
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 51200 ) )\r
#define configMAX_TASK_NAME_LEN ( 10 )\r
#define INCLUDE_vTaskDelayUntil 1\r
#define INCLUDE_vTaskDelay 1\r
#define INCLUDE_eTaskGetState 1\r
-#define INCLUDE_xTimerPendFunctionCall 1\r
+#define INCLUDE_xTimerPendFunctionCall 1\r
\r
/* This demo makes use of one or more example stats formatting functions. These\r
format the raw data provided by the uxTaskGetSystemState() function in to human\r
/* The ID of the interrupt is obtained by bitwise anding the ICCIAR value\r
with 0x3FF. */\r
ulInterruptID = ulICCIAR & 0x3FFUL;\r
- configASSERT( ulInterruptID < XSCUGIC_MAX_NUM_INTR_INPUTS );\r
-\r
- /* Call the function installed in the array of installed handler functions. */\r
- pxVectorEntry = &( pxVectorTable[ ulInterruptID ] );\r
- pxVectorEntry->Handler( pxVectorEntry->CallBackRef );\r
+ if( ulInterruptID < XSCUGIC_MAX_NUM_INTR_INPUTS )\r
+ {\r
+ /* Call the function installed in the array of installed handler functions. */\r
+ pxVectorEntry = &( pxVectorTable[ ulInterruptID ] );\r
+ pxVectorEntry->Handler( pxVectorEntry->CallBackRef );\r
+ }\r
}\r
\r
\r
--- /dev/null
+/*\r
+ FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * Thank you! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+ >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+ >>! a combined work that includes FreeRTOS without being obliged to provide\r
+ >>! the source code for proprietary components outside of the FreeRTOS\r
+ >>! kernel.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+/*\r
+ * This file initialises three timers as follows:\r
+ *\r
+ * Timer 0 and Timer 1 provide the interrupts that are used with the IntQ\r
+ * standard demo tasks, which test interrupt nesting and using queues from\r
+ * interrupts. Both these interrupts operate below the maximum syscall\r
+ * interrupt priority.\r
+ *\r
+ * Timer 2 is a much higher frequency timer that tests the nesting of interrupts\r
+ * that execute above the maximum syscall interrupt priority.\r
+ *\r
+ * All the timers can nest with the tick interrupt - creating a maximum\r
+ * interrupt nesting depth of 4.\r
+ *\r
+ * For convenience, the high frequency timer is also used to provide the time\r
+ * base for the run time stats.\r
+ */\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+\r
+/* Demo includes. */\r
+#include "IntQueueTimer.h"\r
+#include "IntQueue.h"\r
+\r
+/* Xilinx includes. */\r
+#include "xttcps.h"\r
+#include "xscugic.h"\r
+\r
+/* The frequencies at which the first two timers expire are slightly offset to\r
+ensure they don't remain synchronised. The frequency of the interrupt that\r
+operates above the max syscall interrupt priority is 10 times faster so really\r
+hammers the interrupt entry and exit code. */\r
+#define tmrTIMERS_USED 3\r
+#define tmrTIMER_0_FREQUENCY ( 2000UL )\r
+#define tmrTIMER_1_FREQUENCY ( 2001UL )\r
+#define tmrTIMER_2_FREQUENCY ( 20000UL )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The single interrupt service routines that is used to service all three\r
+ * timers.\r
+ */\r
+static void prvTimerHandler( void *CallBackRef );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Hardware constants. */\r
+static const BaseType_t xDeviceIDs[ tmrTIMERS_USED ] = { XPAR_XTTCPS_0_DEVICE_ID, XPAR_XTTCPS_1_DEVICE_ID, XPAR_XTTCPS_2_DEVICE_ID };\r
+static const BaseType_t xInterruptIDs[ tmrTIMERS_USED ] = { XPAR_XTTCPS_0_INTR, XPAR_XTTCPS_1_INTR, XPAR_XTTCPS_2_INTR };\r
+\r
+/* Timer configuration settings. */\r
+typedef struct\r
+{\r
+ uint32_t OutputHz; /* Output frequency. */\r
+ uint16_t Interval; /* Interval value. */\r
+ uint8_t Prescaler; /* Prescaler value. */\r
+ uint16_t Options; /* Option settings. */\r
+} TmrCntrSetup;\r
+\r
+static TmrCntrSetup xTimerSettings[ tmrTIMERS_USED ] =\r
+{\r
+ { tmrTIMER_0_FREQUENCY, 0, 0, XTTCPS_OPTION_INTERVAL_MODE | XTTCPS_OPTION_WAVE_DISABLE },\r
+ { tmrTIMER_1_FREQUENCY, 0, 0, XTTCPS_OPTION_INTERVAL_MODE | XTTCPS_OPTION_WAVE_DISABLE },\r
+ { tmrTIMER_2_FREQUENCY, 0, 0, XTTCPS_OPTION_INTERVAL_MODE | XTTCPS_OPTION_WAVE_DISABLE }\r
+};\r
+\r
+/* Lower priority number means higher logical priority, so\r
+configMAX_API_CALL_INTERRUPT_PRIORITY - 1 is above the maximum system call\r
+interrupt priority. */\r
+static const UBaseType_t uxInterruptPriorities[ tmrTIMERS_USED ] =\r
+{\r
+ configMAX_API_CALL_INTERRUPT_PRIORITY + 1,\r
+ configMAX_API_CALL_INTERRUPT_PRIORITY,\r
+ configMAX_API_CALL_INTERRUPT_PRIORITY - 1\r
+};\r
+\r
+static XTtcPs xTimerInstances[ tmrTIMERS_USED ];\r
+\r
+/* Used to provide a means of ensuring the intended interrupt nesting depth is\r
+actually being reached. */\r
+extern uint32_t ulPortInterruptNesting;\r
+static uint32_t ulMaxRecordedNesting = 0;\r
+\r
+/* For convenience the high frequency timer increments a variable that is then\r
+used as the time base for the run time stats. */\r
+volatile uint32_t ulHighFrequencyTimerCounts = 0;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vInitialiseTimerForIntQueueTest( void )\r
+{\r
+BaseType_t xStatus;\r
+TmrCntrSetup *pxTimerSettings;\r
+extern XScuGic xInterruptController;\r
+BaseType_t xTimer;\r
+XTtcPs *pxTimerInstance;\r
+XTtcPs_Config *pxTimerConfiguration;\r
+const uint8_t ucRisingEdge = 3;\r
+\r
+ for( xTimer = 0; xTimer < tmrTIMERS_USED; xTimer++ )\r
+ {\r
+ /* Look up the timer's configuration. */\r
+ pxTimerInstance = &( xTimerInstances[ xTimer ] );\r
+ pxTimerConfiguration = XTtcPs_LookupConfig( xDeviceIDs[ xTimer ] );\r
+ configASSERT( pxTimerConfiguration );\r
+\r
+ pxTimerSettings = &( xTimerSettings[ xTimer ] );\r
+\r
+ /* Initialise the device. */\r
+ xStatus = XTtcPs_CfgInitialize( pxTimerInstance, pxTimerConfiguration, pxTimerConfiguration->BaseAddress );\r
+ if( xStatus != XST_SUCCESS )\r
+ {\r
+ /* Not sure how to do this before XTtcPs_CfgInitialize is called\r
+ as pxTimerInstance is set within XTtcPs_CfgInitialize(). */\r
+ XTtcPs_Stop( pxTimerInstance );\r
+ xStatus = XTtcPs_CfgInitialize( pxTimerInstance, pxTimerConfiguration, pxTimerConfiguration->BaseAddress );\r
+ configASSERT( xStatus == XST_SUCCESS );\r
+ }\r
+\r
+ /* Set the options. */\r
+ XTtcPs_SetOptions( pxTimerInstance, pxTimerSettings->Options );\r
+\r
+ /* The timer frequency is preset in the pxTimerSettings structure.\r
+ Derive the values for the other structure members. */\r
+ XTtcPs_CalcIntervalFromFreq( pxTimerInstance, pxTimerSettings->OutputHz, &( pxTimerSettings->Interval ), &( pxTimerSettings->Prescaler ) );\r
+\r
+ /* Set the interval and prescale. */\r
+ XTtcPs_SetInterval( pxTimerInstance, pxTimerSettings->Interval );\r
+ XTtcPs_SetPrescaler( pxTimerInstance, pxTimerSettings->Prescaler );\r
+\r
+ /* The priority must be the lowest possible. */\r
+ XScuGic_SetPriorityTriggerType( &xInterruptController, xInterruptIDs[ xTimer ], uxInterruptPriorities[ xTimer ] << portPRIORITY_SHIFT, ucRisingEdge );\r
+\r
+ /* Connect to the interrupt controller. */\r
+ xStatus = XScuGic_Connect( &xInterruptController, xInterruptIDs[ xTimer ], ( Xil_InterruptHandler ) prvTimerHandler, ( void * ) pxTimerInstance );\r
+ configASSERT( xStatus == XST_SUCCESS);\r
+\r
+ /* Enable the interrupt in the GIC. */\r
+ XScuGic_Enable( &xInterruptController, xInterruptIDs[ xTimer ] );\r
+\r
+ /* Enable the interrupts in the timer. */\r
+ XTtcPs_EnableInterrupts( pxTimerInstance, XTTCPS_IXR_INTERVAL_MASK );\r
+\r
+ /* Start the timer. */\r
+ XTtcPs_Start( pxTimerInstance );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvTimerHandler( void *pvCallBackRef )\r
+{\r
+uint32_t ulInterruptStatus;\r
+XTtcPs *pxTimer = ( XTtcPs * ) pvCallBackRef;\r
+BaseType_t xYieldRequired;\r
+\r
+ /* Read the interrupt status, then write it back to clear the interrupt. */\r
+ ulInterruptStatus = XTtcPs_GetInterruptStatus( pxTimer );\r
+ XTtcPs_ClearInterruptStatus( pxTimer, ulInterruptStatus );\r
+\r
+ /* Only one interrupt event type is expected. */\r
+ configASSERT( ( XTTCPS_IXR_INTERVAL_MASK & ulInterruptStatus ) != 0 );\r
+\r
+ /* Check the device ID to know which IntQueue demo to call. */\r
+ if( pxTimer->Config.DeviceId == xDeviceIDs[ 0 ] )\r
+ {\r
+ xYieldRequired = xFirstTimerHandler();\r
+ }\r
+ else if( pxTimer->Config.DeviceId == xDeviceIDs[ 1 ] )\r
+ {\r
+ xYieldRequired = xSecondTimerHandler();\r
+ }\r
+ else\r
+ {\r
+ /* The high frequency timer is also used to generate the time base for\r
+ the run time state. */\r
+ ulHighFrequencyTimerCounts++;\r
+\r
+ /* Latch the highest interrupt nesting count detected. */\r
+ if( ulPortInterruptNesting > ulMaxRecordedNesting )\r
+ {\r
+ ulMaxRecordedNesting = ulPortInterruptNesting;\r
+ }\r
+\r
+ xYieldRequired = pdFALSE;\r
+ }\r
+\r
+ /* If xYieldRequired is not pdFALSE then calling either xFirstTimerHandler()\r
+ or xSecondTimerHandler() resulted in a task leaving the blocked state and\r
+ the task that left the blocked state had a priority higher than the currently\r
+ running task (the task this interrupt interrupted) - so a context switch\r
+ should be performed so the interrupt returns directly to the higher priority\r
+ task. xYieldRequired is tested inside the following macro. */\r
+ portYIELD_FROM_ISR( xYieldRequired );\r
+}\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd. \r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * Thank you! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+ >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+ >>! a combined work that includes FreeRTOS without being obliged to provide\r
+ >>! the source code for proprietary components outside of the FreeRTOS\r
+ >>! kernel.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+#ifndef INT_QUEUE_TIMER_H\r
+#define INT_QUEUE_TIMER_H\r
+\r
+void vInitialiseTimerForIntQueueTest( void );\r
+portBASE_TYPE xTimer0Handler( void );\r
+portBASE_TYPE xTimer1Handler( void );\r
+\r
+#endif\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * Thank you! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+ >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+ >>! a combined work that includes FreeRTOS without being obliged to provide\r
+ >>! the source code for proprietary components outside of the FreeRTOS\r
+ >>! kernel.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1: This project provides two demo applications. A simple blinky style\r
+ * project, and a more comprehensive test and demo application. The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
+ * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
+ * in main.c. This file implements the comprehensive test and demo version.\r
+ *\r
+ * NOTE 2: This file only contains the source code that is specific to the\r
+ * full demo. Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware, are defined in main.c.\r
+ *\r
+ * NOTE 3: The full demo includes a test that checks the floating point context\r
+ * is maintained correctly across task switches. The standard GCC libraries can\r
+ * use floating point registers and made this test fail (unless the tasks that\r
+ * use the library are given a floating point context as described on the\r
+ * documentation page for this demo). printf-stdarg.c is included in this\r
+ * project to prevent the standard GCC libraries being linked into the project.\r
+ *\r
+ ******************************************************************************\r
+ *\r
+ * main_full() creates all the demo application tasks and software timers, then\r
+ * starts the scheduler. The web documentation provides more details of the\r
+ * standard demo application tasks, which provide no particular functionality,\r
+ * but do provide a good example of how to use the FreeRTOS API.\r
+ *\r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
+ * defined and/or created within this file:\r
+ *\r
+ * FreeRTOS+CLI command console. The command console is access through the\r
+ * UART to USB connector on the ZC702 Zynq development board (marked J2). For\r
+ * reasons of robustness testing the UART driver is deliberately written to be\r
+ * inefficient and should not be used as a template for a production driver.\r
+ * Type "help" to see a list of registered commands. The FreeRTOS+CLI license\r
+ * is different to the FreeRTOS license, see http://www.FreeRTOS.org/cli for\r
+ * license and usage details. The default baud rate is 115200.\r
+ *\r
+ * "Reg test" tasks - These fill both the core and floating point registers with\r
+ * known values, then check that each register maintains its expected value for\r
+ * the lifetime of the task. Each task uses a different set of values. The reg\r
+ * test tasks execute with a very low priority, so get preempted very\r
+ * frequently. A register containing an unexpected value is indicative of an\r
+ * error in the context switching mechanism.\r
+ *\r
+ * "Check" task - The check task period is initially set to three seconds. The\r
+ * task checks that all the standard demo tasks, and the register check tasks,\r
+ * are not only still executing, but are executing without reporting any errors.\r
+ * If the check task discovers that a task has either stalled, or reported an\r
+ * error, then it changes its own execution period from the initial three\r
+ * seconds, to just 200ms. The check task also toggles an LED each time it is\r
+ * called. This provides a visual indication of the system status: If the LED\r
+ * toggles every three seconds, then no issues have been discovered. If the LED\r
+ * toggles every 200ms, then an issue has been discovered with at least one\r
+ * task.\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "timers.h"\r
+#include "semphr.h"\r
+\r
+/* Standard demo application includes. */\r
+#include "flop.h"\r
+#include "semtest.h"\r
+#include "dynamic.h"\r
+#include "BlockQ.h"\r
+#include "blocktim.h"\r
+#include "countsem.h"\r
+#include "GenQTest.h"\r
+#include "recmutex.h"\r
+#include "death.h"\r
+#include "partest.h"\r
+#include "comtest2.h"\r
+#include "serial.h"\r
+#include "TimerDemo.h"\r
+#include "QueueOverwrite.h"\r
+#include "IntQueue.h"\r
+\r
+/* Priorities for the demo application tasks. */\r
+#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )\r
+#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )\r
+#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )\r
+#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
+#define mainUART_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3UL )\r
+#define mainCOM_TEST_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
+#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )\r
+#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY )\r
+\r
+/* The priority used by the UART command console task. */\r
+#define mainUART_COMMAND_CONSOLE_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )\r
+\r
+/* The LED used by the check timer. */\r
+#define mainCHECK_LED ( 0 )\r
+\r
+/* A block time of zero simply means "don't block". */\r
+#define mainDONT_BLOCK ( 0UL )\r
+\r
+/* The period after which the check timer will expire, in ms, provided no errors\r
+have been reported by any of the standard demo tasks. ms are converted to the\r
+equivalent in ticks using the portTICK_PERIOD_MS constant. */\r
+#define mainNO_ERROR_CHECK_TASK_PERIOD ( 3000UL / portTICK_PERIOD_MS )\r
+\r
+/* The period at which the check timer will expire, in ms, if an error has been\r
+reported in one of the standard demo tasks. ms are converted to the equivalent\r
+in ticks using the portTICK_PERIOD_MS constant. */\r
+#define mainERROR_CHECK_TASK_PERIOD ( 200UL / portTICK_PERIOD_MS )\r
+\r
+/* Parameters that are passed into the register check tasks solely for the\r
+purpose of ensuring parameters are passed into tasks correctly. */\r
+#define mainREG_TEST_TASK_1_PARAMETER ( ( void * ) 0x12345678 )\r
+#define mainREG_TEST_TASK_2_PARAMETER ( ( void * ) 0x87654321 )\r
+\r
+/* The base period used by the timer test tasks. */\r
+#define mainTIMER_TEST_PERIOD ( 50 )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Called by main() to run the full demo (as opposed to the blinky demo) when\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0.\r
+ */\r
+void main_full( void );\r
+\r
+/*\r
+ * The check task, as described at the top of this file.\r
+ */\r
+static void prvCheckTask( void *pvParameters );\r
+\r
+/*\r
+ * Register check tasks, and the tasks used to write over and check the contents\r
+ * of the FPU registers, as described at the top of this file. The nature of\r
+ * these files necessitates that they are written in an assembly file, but the\r
+ * entry points are kept in the C file for the convenience of checking the task\r
+ * parameter.\r
+ */\r
+static void prvRegTestTaskEntry1( void *pvParameters );\r
+extern void vRegTest1Implementation( void );\r
+static void prvRegTestTaskEntry2( void *pvParameters );\r
+extern void vRegTest2Implementation( void );\r
+\r
+/*\r
+ * Register commands that can be used with FreeRTOS+CLI. The commands are\r
+ * defined in CLI-Commands.c and File-Related-CLI-Command.c respectively.\r
+ */\r
+extern void vRegisterSampleCLICommands( void );\r
+\r
+/*\r
+ * The task that manages the FreeRTOS+CLI input and output.\r
+ */\r
+extern void vUARTCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The following two variables are used to communicate the status of the\r
+register check tasks to the check task. If the variables keep incrementing,\r
+then the register check tasks has not discovered any errors. If a variable\r
+stops incrementing, then an error has been found. */\r
+volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_full( void )\r
+{\r
+ /* Start all the other standard demo/test tasks. They have not particular\r
+ functionality, but do demonstrate how to use the FreeRTOS API and test the\r
+ kernel port. */\r
+ vStartInterruptQueueTasks();\r
+ vStartDynamicPriorityTasks();\r
+ vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+ vCreateBlockTimeTasks();\r
+ vStartCountingSemaphoreTasks();\r
+ vStartGenericQueueTasks( tskIDLE_PRIORITY );\r
+ vStartRecursiveMutexTasks();\r
+ vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+ vStartMathTasks( mainFLOP_TASK_PRIORITY );\r
+ vStartTimerDemoTask( mainTIMER_TEST_PERIOD );\r
+ vStartQueueOverwriteTask( mainQUEUE_OVERWRITE_PRIORITY );\r
+\r
+ /* Start the tasks that implements the command console on the UART, as\r
+ described above. */\r
+ vUARTCommandConsoleStart( mainUART_COMMAND_CONSOLE_STACK_SIZE, mainUART_COMMAND_CONSOLE_TASK_PRIORITY );\r
+\r
+ /* Register the standard CLI commands. */\r
+ vRegisterSampleCLICommands();\r
+\r
+ /* Create the register check tasks, as described at the top of this file */\r
+ xTaskCreate( prvRegTestTaskEntry1, "Reg1", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_1_PARAMETER, tskIDLE_PRIORITY, NULL );\r
+ xTaskCreate( prvRegTestTaskEntry2, "Reg2", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_2_PARAMETER, tskIDLE_PRIORITY, NULL );\r
+\r
+ /* Create the task that performs the 'check' functionality, as described at\r
+ the top of this file. */\r
+ xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
+\r
+ /* The set of tasks created by the following function call have to be\r
+ created last as they keep account of the number of tasks they expect to see\r
+ running. */\r
+ vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
+\r
+ /* Start the scheduler. */\r
+ vTaskStartScheduler();\r
+\r
+ /* If all is well, the scheduler will now be running, and the following\r
+ line will never be reached. If the following line does execute, then\r
+ there was either insufficient FreeRTOS heap memory available for the idle\r
+ and/or timer tasks to be created, or vTaskStartScheduler() was called from\r
+ User mode. See the memory management section on the FreeRTOS web site for\r
+ more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The\r
+ mode from which main() is called is set in the C start up code and must be\r
+ a privileged mode (not user mode). */\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvCheckTask( void *pvParameters )\r
+{\r
+portTickType xDelayPeriod = mainNO_ERROR_CHECK_TASK_PERIOD;\r
+portTickType xLastExecutionTime;\r
+static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;\r
+unsigned long ulErrorFound = pdFALSE;\r
+\r
+ /* Just to stop compiler warnings. */\r
+ ( void ) pvParameters;\r
+\r
+ /* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()\r
+ works correctly. */\r
+ xLastExecutionTime = xTaskGetTickCount();\r
+\r
+ /* Cycle for ever, delaying then checking all the other tasks are still\r
+ operating without error. The onboard LED is toggled on each iteration.\r
+ If an error is detected then the delay period is decreased from\r
+ mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD. This has the\r
+ effect of increasing the rate at which the onboard LED toggles, and in so\r
+ doing gives visual feedback of the system status. */\r
+ for( ;; )\r
+ {\r
+ /* Delay until it is time to execute again. */\r
+ vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod );\r
+\r
+ /* Check all the demo tasks (other than the flash tasks) to ensure\r
+ that they are all still running, and that none have detected an error. */\r
+ if( xAreIntQueueTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreMathsTaskStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xIsCreateTaskStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreTimerDemoTasksStillRunning( ( portTickType ) mainNO_ERROR_CHECK_TASK_PERIOD ) != pdPASS )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xIsQueueOverwriteTaskStillRunning() != pdPASS )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ /* Check that the register test 1 task is still running. */\r
+ if( ulLastRegTest1Value == ulRegTest1LoopCounter )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+ ulLastRegTest1Value = ulRegTest1LoopCounter;\r
+\r
+ /* Check that the register test 2 task is still running. */\r
+ if( ulLastRegTest2Value == ulRegTest2LoopCounter )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+ ulLastRegTest2Value = ulRegTest2LoopCounter;\r
+\r
+ /* Toggle the check LED to give an indication of the system status. If\r
+ the LED toggles every mainNO_ERROR_CHECK_TASK_PERIOD milliseconds then\r
+ everything is ok. A faster toggle indicates an error. */\r
+ vParTestToggleLED( mainCHECK_LED );\r
+\r
+ if( ulErrorFound != pdFALSE )\r
+ {\r
+ /* An error has been detected in one of the tasks - flash the LED\r
+ at a higher frequency to give visible feedback that something has\r
+ gone wrong (it might just be that the loop back connector required\r
+ by the comtest tasks has not been fitted). */\r
+ xDelayPeriod = mainERROR_CHECK_TASK_PERIOD;\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvRegTestTaskEntry1( void *pvParameters )\r
+{\r
+ /* Although the regtest task is written in assembler, its entry point is\r
+ written in C for convenience of checking the task parameter is being passed\r
+ in correctly. */\r
+ if( pvParameters == mainREG_TEST_TASK_1_PARAMETER )\r
+ {\r
+ /* The reg test task also tests the floating point registers. Tasks\r
+ that use the floating point unit must call vPortTaskUsesFPU() before\r
+ any floating point instructions are executed. */\r
+ vPortTaskUsesFPU();\r
+\r
+ /* Start the part of the test that is written in assembler. */\r
+ vRegTest1Implementation();\r
+ }\r
+\r
+ /* The following line will only execute if the task parameter is found to\r
+ be incorrect. The check timer will detect that the regtest loop counter is\r
+ not being incremented and flag an error. */\r
+ vTaskDelete( NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvRegTestTaskEntry2( void *pvParameters )\r
+{\r
+ /* Although the regtest task is written in assembler, its entry point is\r
+ written in C for convenience of checking the task parameter is being passed\r
+ in correctly. */\r
+ if( pvParameters == mainREG_TEST_TASK_2_PARAMETER )\r
+ {\r
+ /* The reg test task also tests the floating point registers. Tasks\r
+ that use the floating point unit must call vPortTaskUsesFPU() before\r
+ any floating point instructions are executed. */\r
+ vPortTaskUsesFPU();\r
+\r
+ /* Start the part of the test that is written in assembler. */\r
+ vRegTest2Implementation();\r
+ }\r
+\r
+ /* The following line will only execute if the task parameter is found to\r
+ be incorrect. The check timer will detect that the regtest loop counter is\r
+ not being incremented and flag an error. */\r
+ vTaskDelete( NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
+\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+\r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
+ http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+\r
+ >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
+ details. You should have received a copy of the GNU General Public License\r
+ and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
+ viewed here: http://www.freertos.org/a00114.html and also obtained by\r
+ writing to Real Time Engineers Ltd., contact details for whom are available\r
+ on the FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
+ fully thread aware and reentrant UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems, who sell the code with commercial support,\r
+ indemnification and middleware, under the OpenRTOS brand.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+*/\r
+\r
+ .global vRegTest1Implementation\r
+ .global vRegTest2Implementation\r
+ .extern ulRegTest1LoopCounter\r
+ .extern ulRegTest2LoopCounter\r
+\r
+ .text\r
+ .arm\r
+\r
+ /* This function is explained in the comments at the top of main-full.c. */\r
+vRegTest1Implementation:\r
+\r
+ /* Fill each general purpose register with a known value. */\r
+ mov r0, #0xFF\r
+ mov r1, #0x11\r
+ mov r2, #0x22\r
+ mov r3, #0x33\r
+ mov r4, #0x44\r
+ mov r5, #0x55\r
+ mov r6, #0x66\r
+ mov r7, #0x77\r
+ mov r8, #0x88\r
+ mov r9, #0x99\r
+ mov r10, #0xAA\r
+ mov r11, #0xBB\r
+ mov r12, #0xCC\r
+ mov r14, #0xEE\r
+\r
+ /* Fill each FPU register with a known value. */\r
+ vmov d0, r0, r1\r
+ vmov d1, r2, r3\r
+ vmov d2, r4, r5\r
+ vmov d3, r6, r7\r
+ vmov d4, r8, r9\r
+ vmov d5, r10, r11\r
+ vmov d6, r0, r1\r
+ vmov d7, r2, r3\r
+ vmov d8, r4, r5\r
+ vmov d9, r6, r7\r
+ vmov d10, r8, r9\r
+ vmov d11, r10, r11\r
+ vmov d12, r0, r1\r
+ vmov d13, r2, r3\r
+ vmov d14, r4, r5\r
+ vmov d15, r6, r7\r
+\r
+ vmov d16, r0, r1\r
+ vmov d17, r2, r3\r
+ vmov d18, r4, r5\r
+ vmov d19, r6, r7\r
+ vmov d20, r8, r9\r
+ vmov d21, r10, r11\r
+ vmov d22, r0, r1\r
+ vmov d23, r2, r3\r
+ vmov d24, r4, r5\r
+ vmov d25, r6, r7\r
+ vmov d26, r8, r9\r
+ vmov d27, r10, r11\r
+ vmov d28, r0, r1\r
+ vmov d29, r2, r3\r
+ vmov d30, r4, r5\r
+ vmov d31, r6, r7\r
+\r
+ /* Loop, checking each itteration that each register still contains the\r
+ expected value. */\r
+reg1_loop:\r
+ /* Yield to increase test coverage */\r
+ svc 0\r
+\r
+ /* Check all the VFP registers still contain the values set above.\r
+ First save registers that are clobbered by the test. */\r
+ push { r0-r1 }\r
+\r
+ vmov r0, r1, d0\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d1\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d2\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d3\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d4\r
+ cmp r0, #0x88\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x99\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d5\r
+ cmp r0, #0xAA\r
+ bne reg1_error_loopf\r
+ cmp r1, #0xBB\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d6\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d7\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d8\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d9\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d10\r
+ cmp r0, #0x88\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x99\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d11\r
+ cmp r0, #0xAA\r
+ bne reg1_error_loopf\r
+ cmp r1, #0xBB\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d12\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d13\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d14\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d15\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+\r
+ vmov r0, r1, d16\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d17\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d18\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d19\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d20\r
+ cmp r0, #0x88\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x99\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d21\r
+ cmp r0, #0xAA\r
+ bne reg1_error_loopf\r
+ cmp r1, #0xBB\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d22\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d23\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d24\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d25\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d26\r
+ cmp r0, #0x88\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x99\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d27\r
+ cmp r0, #0xAA\r
+ bne reg1_error_loopf\r
+ cmp r1, #0xBB\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d28\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d29\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d30\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d31\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+\r
+ /* Restore the registers that were clobbered by the test. */\r
+ pop {r0-r1}\r
+\r
+ /* VFP register test passed. Jump to the core register test. */\r
+ b reg1_loopf_pass\r
+\r
+reg1_error_loopf:\r
+ /* If this line is hit then a VFP register value was found to be\r
+ incorrect. */\r
+ b reg1_error_loopf\r
+\r
+reg1_loopf_pass:\r
+\r
+ /* Test each general purpose register to check that it still contains the\r
+ expected known value, jumping to reg1_error_loop if any register contains\r
+ an unexpected value. */\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loop\r
+ cmp r1, #0x11\r
+ bne reg1_error_loop\r
+ cmp r2, #0x22\r
+ bne reg1_error_loop\r
+ cmp r3, #0x33\r
+ bne reg1_error_loop\r
+ cmp r4, #0x44\r
+ bne reg1_error_loop\r
+ cmp r5, #0x55\r
+ bne reg1_error_loop\r
+ cmp r6, #0x66\r
+ bne reg1_error_loop\r
+ cmp r7, #0x77\r
+ bne reg1_error_loop\r
+ cmp r8, #0x88\r
+ bne reg1_error_loop\r
+ cmp r9, #0x99\r
+ bne reg1_error_loop\r
+ cmp r10, #0xAA\r
+ bne reg1_error_loop\r
+ cmp r11, #0xBB\r
+ bne reg1_error_loop\r
+ cmp r12, #0xCC\r
+ bne reg1_error_loop\r
+ cmp r14, #0xEE\r
+ bne reg1_error_loop\r
+\r
+ /* Everything passed, increment the loop counter. */\r
+ push { r0-r1 }\r
+ ldr r0, =ulRegTest1LoopCounter\r
+ ldr r1, [r0]\r
+ adds r1, r1, #1\r
+ str r1, [r0]\r
+ pop { r0-r1 }\r
+\r
+ /* Start again. */\r
+ b reg1_loop\r
+\r
+reg1_error_loop:\r
+ /* If this line is hit then there was an error in a core register value.\r
+ The loop ensures the loop counter stops incrementing. */\r
+ b reg1_error_loop\r
+ nop\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+vRegTest2Implementation:\r
+\r
+ /* Put a known value in each register. */\r
+ mov r0, #0xFF000000\r
+ mov r1, #0x11000000\r
+ mov r2, #0x22000000\r
+ mov r3, #0x33000000\r
+ mov r4, #0x44000000\r
+ mov r5, #0x55000000\r
+ mov r6, #0x66000000\r
+ mov r7, #0x77000000\r
+ mov r8, #0x88000000\r
+ mov r9, #0x99000000\r
+ mov r10, #0xAA000000\r
+ mov r11, #0xBB000000\r
+ mov r12, #0xCC000000\r
+ mov r14, #0xEE000000\r
+\r
+ /* Likewise the floating point registers */\r
+ vmov d0, r0, r1\r
+ vmov d1, r2, r3\r
+ vmov d2, r4, r5\r
+ vmov d3, r6, r7\r
+ vmov d4, r8, r9\r
+ vmov d5, r10, r11\r
+ vmov d6, r0, r1\r
+ vmov d7, r2, r3\r
+ vmov d8, r4, r5\r
+ vmov d9, r6, r7\r
+ vmov d10, r8, r9\r
+ vmov d11, r10, r11\r
+ vmov d12, r0, r1\r
+ vmov d13, r2, r3\r
+ vmov d14, r4, r5\r
+ vmov d15, r6, r7\r
+\r
+ vmov d16, r0, r1\r
+ vmov d17, r2, r3\r
+ vmov d18, r4, r5\r
+ vmov d19, r6, r7\r
+ vmov d20, r8, r9\r
+ vmov d21, r10, r11\r
+ vmov d22, r0, r1\r
+ vmov d23, r2, r3\r
+ vmov d24, r4, r5\r
+ vmov d25, r6, r7\r
+ vmov d26, r8, r9\r
+ vmov d27, r10, r11\r
+ vmov d28, r0, r1\r
+ vmov d29, r2, r3\r
+ vmov d30, r4, r5\r
+ vmov d31, r6, r7\r
+\r
+ /* Loop, checking each itteration that each register still contains the\r
+ expected value. */\r
+reg2_loop:\r
+ /* Check all the VFP registers still contain the values set above.\r
+ First save registers that are clobbered by the test. */\r
+ push { r0-r1 }\r
+\r
+ vmov r0, r1, d0\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d1\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d2\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d3\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d4\r
+ cmp r0, #0x88000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x99000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d5\r
+ cmp r0, #0xAA000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0xBB000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d6\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d7\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d8\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d9\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d10\r
+ cmp r0, #0x88000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x99000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d11\r
+ cmp r0, #0xAA000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0xBB000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d12\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d13\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d14\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d15\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+\r
+ vmov r0, r1, d16\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d17\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d18\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d19\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d20\r
+ cmp r0, #0x88000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x99000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d21\r
+ cmp r0, #0xAA000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0xBB000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d22\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d23\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d24\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d25\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d26\r
+ cmp r0, #0x88000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x99000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d27\r
+ cmp r0, #0xAA000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0xBB000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d28\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d29\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d30\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d31\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+\r
+ /* Restore the registers that were clobbered by the test. */\r
+ pop {r0-r1}\r
+\r
+ /* VFP register test passed. Jump to the core register test. */\r
+ b reg2_loopf_pass\r
+\r
+reg2_error_loopf:\r
+ /* If this line is hit then a VFP register value was found to be\r
+ incorrect. */\r
+ b reg2_error_loopf\r
+\r
+reg2_loopf_pass:\r
+\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loop\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loop\r
+ cmp r2, #0x22000000\r
+ bne reg2_error_loop\r
+ cmp r3, #0x33000000\r
+ bne reg2_error_loop\r
+ cmp r4, #0x44000000\r
+ bne reg2_error_loop\r
+ cmp r5, #0x55000000\r
+ bne reg2_error_loop\r
+ cmp r6, #0x66000000\r
+ bne reg2_error_loop\r
+ cmp r7, #0x77000000\r
+ bne reg2_error_loop\r
+ cmp r8, #0x88000000\r
+ bne reg2_error_loop\r
+ cmp r9, #0x99000000\r
+ bne reg2_error_loop\r
+ cmp r10, #0xAA000000\r
+ bne reg2_error_loop\r
+ cmp r11, #0xBB000000\r
+ bne reg2_error_loop\r
+ cmp r12, #0xCC000000\r
+ bne reg2_error_loop\r
+ cmp r14, #0xEE000000\r
+ bne reg2_error_loop\r
+\r
+ /* Everything passed, increment the loop counter. */\r
+ push { r0-r1 }\r
+ ldr r0, =ulRegTest2LoopCounter\r
+ ldr r1, [r0]\r
+ adds r1, r1, #1\r
+ str r1, [r0]\r
+ pop { r0-r1 }\r
+\r
+ /* Start again. */\r
+ b reg2_loop\r
+\r
+reg2_error_loop:\r
+ /* If this line is hit then there was an error in a core register value.\r
+ The loop ensures the loop counter stops incrementing. */\r
+ b reg2_error_loop\r
+ nop\r
+\r
+\r
+ .end\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V8.0.0:rc2 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * Thank you! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+ >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+ >>! a combined work that includes FreeRTOS without being obliged to provide\r
+ >>! the source code for proprietary components outside of the FreeRTOS\r
+ >>! kernel.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+ */\r
+\r
+/*\r
+ BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.\r
+\r
+ Note1: This driver is used specifically to provide an interface to the\r
+ FreeRTOS+CLI command interpreter. It is *not* intended to be a generic\r
+ serial port driver. Nor is it intended to be used as an example of an\r
+ efficient implementation. In particular, a queue is used to buffer\r
+ received characters, which is fine in this case as key presses arrive\r
+ slowly, but a DMA and/or RAM buffer should be used in place of the queue in\r
+ applications that expect higher throughput.\r
+\r
+ Note2: This driver does not attempt to handle UART errors.\r
+*/\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "queue.h"\r
+#include "semphr.h"\r
+\r
+/* Demo application includes. */\r
+#include "serial.h"\r
+\r
+/* Xilinx includes. */\r
+#include "xuartps.h"\r
+#include "xscugic.h"\r
+#include "xil_exception.h"\r
+\r
+/* The UART interrupts of interest when receiving. */\r
+#define serRECEIVE_INTERRUPT_MASK ( XUARTPS_IXR_RXOVR | XUARTPS_IXR_RXFULL | XUARTPS_IXR_TOUT )\r
+\r
+/* The UART interrupts of interest when transmitting. */\r
+#define serTRANSMIT_IINTERRUPT_MASK ( XUARTPS_IXR_TXEMPTY )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The UART being used. */\r
+static XUartPs xUARTInstance;\r
+\r
+/* The interrupt controller, which is configred by the hardware setup routines\r
+defined in main(). */\r
+extern XScuGic xInterruptController;\r
+\r
+/* The queue into which received key presses are placed. NOTE THE COMMENTS AT\r
+THE TOP OF THIS FILE REGARDING THE USE OF QUEUES FOR THIS PURPOSE. */\r
+static QueueHandle_t xRxQueue = NULL;\r
+\r
+/* The semaphore used to indicate the end of a transmission. */\r
+static SemaphoreHandle_t xTxCompleteSemaphore = NULL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The UART interrupt handler is defined in this file to provide more control,\r
+ * but still uses parts of the Xilinx provided driver.\r
+ */\r
+void prvUART_Handler( void *pvNotUsed );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * See the serial2.h header file.\r
+ */\r
+xComPortHandle xSerialPortInitMinimal( uint32_t ulWantedBaud, UBaseType_t uxQueueLength )\r
+{\r
+BaseType_t xStatus;\r
+XUartPs_Config *pxConfig;\r
+\r
+ /* Create the queue used to hold received characters. NOTE THE COMMENTS AT\r
+ THE TOP OF THIS FILE REGARDING THE QUEUE OF QUEUES FOR THIS PURPSOE. */\r
+ xRxQueue = xQueueCreate( uxQueueLength, sizeof( char ) );\r
+ configASSERT( xRxQueue );\r
+\r
+ /* Create the semaphore used to signal the end of a transmission, then take\r
+ the semaphore so it is in the correct state the first time\r
+ xSerialSendString() is called. A block time of zero is used when taking\r
+ the semaphore as it is guaranteed to be available (it was just created). */\r
+ xTxCompleteSemaphore = xSemaphoreCreateMutex();\r
+ configASSERT( xTxCompleteSemaphore );\r
+ xSemaphoreTake( xTxCompleteSemaphore, 0 );\r
+\r
+ /* Look up the UART configuration then initialise the dirver. */\r
+ pxConfig = XUartPs_LookupConfig( XPAR_XUARTPS_0_DEVICE_ID );\r
+\r
+ /* Initialise the driver. */\r
+ xStatus = XUartPs_CfgInitialize( &xUARTInstance, pxConfig, XPAR_PS7_UART_1_BASEADDR );\r
+ configASSERT( xStatus == XST_SUCCESS );\r
+\r
+ /* Misc. parameter configuration. */\r
+ XUartPs_SetBaudRate( &xUARTInstance, ulWantedBaud );\r
+ XUartPs_SetOperMode( &xUARTInstance, XUARTPS_OPER_MODE_NORMAL );\r
+\r
+ /* Install the interrupt service routine that is defined within this\r
+ file. */\r
+ xStatus = XScuGic_Connect( &xInterruptController, XPAR_XUARTPS_1_INTR, (Xil_ExceptionHandler) prvUART_Handler, (void *) &xUARTInstance );\r
+ configASSERT( xStatus == XST_SUCCESS );\r
+\r
+ /* Ensure interrupts start clear. */\r
+ XUartPs_WriteReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_ISR_OFFSET, XUARTPS_IXR_MASK );\r
+\r
+ /* Enable the UART interrupt within the GIC. */\r
+ XScuGic_Enable( &xInterruptController, XPAR_XUARTPS_1_INTR );\r
+\r
+ /* Enable the interrupts of interest in the UART. */\r
+ XUartPs_SetInterruptMask( &xUARTInstance, XUARTPS_IXR_RXFULL | XUARTPS_IXR_RXOVR | XUARTPS_IXR_TOUT | XUARTPS_IXR_TXEMPTY );\r
+\r
+ /* Set the receive timeout. */\r
+ XUartPs_SetRecvTimeout( &xUARTInstance, 8 );\r
+\r
+ return ( xComPortHandle ) 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+BaseType_t xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )\r
+{\r
+BaseType_t xReturn;\r
+\r
+ /* Only a single port is supported. */\r
+ ( void ) pxPort;\r
+\r
+ /* Obtain a received character from the queue - entering the Blocked state\r
+ (so not consuming any processing time) to wait for a character if one is not\r
+ already available. */\r
+ xReturn = xQueueReceive( xRxQueue, pcRxedChar, xBlockTime );\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )\r
+{\r
+const TickType_t xMaxWait = 200UL / portTICK_PERIOD_MS;\r
+\r
+ /* Only a single port is supported. */\r
+ ( void ) pxPort;\r
+\r
+ /* Start the transmission. The interrupt service routine will complete the\r
+ transmission if necessary. */\r
+ XUartPs_Send( &xUARTInstance, ( void * ) pcString, usStringLength );\r
+\r
+ /* Wait until the string has been transmitted before exiting this function,\r
+ otherwise there is a risk the calling function will overwrite the string\r
+ pointed to by the pcString parameter while it is still being transmitted.\r
+ The calling task will wait in the Blocked state (so not consuming any\r
+ processing time) until the mutex is available. */\r
+ xSemaphoreTake( xTxCompleteSemaphore, xMaxWait );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )\r
+{\r
+ /* Only a single port is supported. */\r
+ ( void ) pxPort;\r
+\r
+ /* Send the character. */\r
+ XUartPs_Send( &xUARTInstance, ( void * ) &cOutChar, sizeof( cOutChar ) );\r
+\r
+ /* Wait for the transmission to be complete so the mutex is left in the\r
+ correct state for the next time vSerialPutString() is called. */\r
+ xSemaphoreTake( xTxCompleteSemaphore, xBlockTime );\r
+\r
+ return pdPASS;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSerialClose(xComPortHandle xPort)\r
+{\r
+ /* Not supported as not required by the demo application. */\r
+ ( void ) xPort;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void prvUART_Handler( void *pvNotUsed )\r
+{\r
+extern unsigned int XUartPs_SendBuffer( XUartPs *InstancePtr );\r
+uint32_t ulActiveInterrupts, ulChannelStatusRegister;\r
+BaseType_t xHigherPriorityTaskWoken = pdFALSE;\r
+char cChar;\r
+\r
+ configASSERT( pvNotUsed == &xUARTInstance );\r
+\r
+ /* Read the interrupt ID register to see which interrupt is active. */\r
+ ulActiveInterrupts = XUartPs_ReadReg(XPAR_PS7_UART_1_BASEADDR, XUARTPS_IMR_OFFSET);\r
+ ulActiveInterrupts &= XUartPs_ReadReg(XPAR_PS7_UART_1_BASEADDR, XUARTPS_ISR_OFFSET);\r
+\r
+ /* Are any receive events of interest active? */\r
+ if( ( ulActiveInterrupts & serRECEIVE_INTERRUPT_MASK ) != 0 )\r
+ {\r
+ /* Read the Channel Status Register to determine if there is any data in\r
+ the RX FIFO. */\r
+ ulChannelStatusRegister = XUartPs_ReadReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_SR_OFFSET );\r
+\r
+ /* Move data from the Rx FIFO to the Rx queue. NOTE THE COMMENTS AT THE\r
+ TOP OF THIS FILE ABOUT USING QUEUES FOR THIS PURPSOE. */\r
+ while( ( ulChannelStatusRegister & XUARTPS_SR_RXEMPTY ) == 0 )\r
+ {\r
+ cChar = XUartPs_ReadReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_FIFO_OFFSET );\r
+\r
+ /* If writing to the queue unblocks a task, and the unblocked task\r
+ has a priority above the currently running task (the task that this\r
+ interrupt interrupted), then xHigherPriorityTaskWoken will be set\r
+ to pdTRUE inside the xQueueSendFromISR() function.\r
+ xHigherPriorityTaskWoken is then passed to portYIELD_FROM_ISR() at\r
+ the end of this interrupt handler to request a context switch so the\r
+ interrupt returns directly to the (higher priority) unblocked\r
+ task. */\r
+ xQueueSendFromISR( xRxQueue, &cChar, &xHigherPriorityTaskWoken );\r
+ ulChannelStatusRegister = XUartPs_ReadReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_SR_OFFSET );\r
+ }\r
+ }\r
+\r
+ /* Are any transmit events of interest active? */\r
+ if( ( ulActiveInterrupts & serTRANSMIT_IINTERRUPT_MASK ) != 0 )\r
+ {\r
+ if( xUARTInstance.SendBuffer.RemainingBytes == 0 )\r
+ {\r
+ /* Give back the semaphore to indicate that the tranmission is\r
+ complete. If giving the semaphore unblocks a task, and the\r
+ unblocked task has a priority above the currently running task (the\r
+ task that this interrupt interrupted), then xHigherPriorityTaskWoken\r
+ will be set to pdTRUE inside the xSemaphoreGiveFromISR() function.\r
+ xHigherPriorityTaskWoken is then passed to portYIELD_FROM_ISR() at\r
+ the end of this interrupt handler to request a context switch so the\r
+ interrupt returns directly to the (higher priority) unblocked\r
+ task. */\r
+ xSemaphoreGiveFromISR( xTxCompleteSemaphore, &xHigherPriorityTaskWoken );\r
+\r
+ /* No more data to transmit. */\r
+ XUartPs_WriteReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_IDR_OFFSET, XUARTPS_IXR_TXEMPTY );\r
+ }\r
+ else\r
+ {\r
+ /* More data to send. */\r
+ XUartPs_SendBuffer( &xUARTInstance );\r
+ }\r
+ }\r
+\r
+ /* portYIELD_FROM_ISR() will request a context switch if executing this\r
+ interrupt handler caused a task to leave the blocked state, and the task\r
+ that left the blocked state has a higher priority than the currently running\r
+ task (the task this interrupt interrupted). See the comment above the calls\r
+ to xSemaphoreGiveFromISR() and xQueueSendFromISR() within this function. */\r
+ portYIELD_FROM_ISR( xHigherPriorityTaskWoken );\r
+\r
+ /* Clear the interrupt status. */\r
+ XUartPs_WriteReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_ISR_OFFSET, ulActiveInterrupts );\r
+}\r
+\r
+\r
+\r
+\r
+\r
+++ /dev/null
-/*\r
- FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that has become a de facto standard. *\r
- * *\r
- * Help yourself get started quickly and support the FreeRTOS *\r
- * project by purchasing a FreeRTOS tutorial book, reference *\r
- * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
- * *\r
- * Thank you! *\r
- * *\r
- ***************************************************************************\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
-\r
- >>! NOTE: The modification to the GPL is included to allow you to distribute\r
- >>! a combined work that includes FreeRTOS without being obliged to provide\r
- >>! the source code for proprietary components outside of the FreeRTOS\r
- >>! kernel.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- 1 tab == 4 spaces!\r
-\r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
- license and Real Time Engineers Ltd. contact details.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/*\r
- * This file initialises three timers as follows:\r
- *\r
- * Timer 0 and Timer 1 provide the interrupts that are used with the IntQ\r
- * standard demo tasks, which test interrupt nesting and using queues from\r
- * interrupts. Both these interrupts operate below the maximum syscall\r
- * interrupt priority.\r
- *\r
- * Timer 2 is a much higher frequency timer that tests the nesting of interrupts\r
- * that execute above the maximum syscall interrupt priority.\r
- *\r
- * All the timers can nest with the tick interrupt - creating a maximum\r
- * interrupt nesting depth of 4.\r
- *\r
- * For convenience, the high frequency timer is also used to provide the time\r
- * base for the run time stats.\r
- */\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-\r
-/* Demo includes. */\r
-#include "IntQueueTimer.h"\r
-#include "IntQueue.h"\r
-\r
-/* Xilinx includes. */\r
-#include "xttcps.h"\r
-#include "xscugic.h"\r
-\r
-/* The frequencies at which the first two timers expire are slightly offset to\r
-ensure they don't remain synchronised. The frequency of the interrupt that\r
-operates above the max syscall interrupt priority is 10 times faster so really\r
-hammers the interrupt entry and exit code. */\r
-#define tmrTIMERS_USED 3\r
-#define tmrTIMER_0_FREQUENCY ( 2000UL )\r
-#define tmrTIMER_1_FREQUENCY ( 2001UL )\r
-#define tmrTIMER_2_FREQUENCY ( 20000UL )\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * The single interrupt service routines that is used to service all three\r
- * timers.\r
- */\r
-static void prvTimerHandler( void *CallBackRef );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Hardware constants. */\r
-static const BaseType_t xDeviceIDs[ tmrTIMERS_USED ] = { XPAR_XTTCPS_0_DEVICE_ID, XPAR_XTTCPS_1_DEVICE_ID, XPAR_XTTCPS_2_DEVICE_ID };\r
-static const BaseType_t xInterruptIDs[ tmrTIMERS_USED ] = { XPAR_XTTCPS_0_INTR, XPAR_XTTCPS_1_INTR, XPAR_XTTCPS_2_INTR };\r
-\r
-/* Timer configuration settings. */\r
-typedef struct\r
-{\r
- uint32_t OutputHz; /* Output frequency. */\r
- uint16_t Interval; /* Interval value. */\r
- uint8_t Prescaler; /* Prescaler value. */\r
- uint16_t Options; /* Option settings. */\r
-} TmrCntrSetup;\r
-\r
-static TmrCntrSetup xTimerSettings[ tmrTIMERS_USED ] =\r
-{\r
- { tmrTIMER_0_FREQUENCY, 0, 0, XTTCPS_OPTION_INTERVAL_MODE | XTTCPS_OPTION_WAVE_DISABLE },\r
- { tmrTIMER_1_FREQUENCY, 0, 0, XTTCPS_OPTION_INTERVAL_MODE | XTTCPS_OPTION_WAVE_DISABLE },\r
- { tmrTIMER_2_FREQUENCY, 0, 0, XTTCPS_OPTION_INTERVAL_MODE | XTTCPS_OPTION_WAVE_DISABLE }\r
-};\r
-\r
-/* Lower priority number means higher logical priority, so\r
-configMAX_API_CALL_INTERRUPT_PRIORITY - 1 is above the maximum system call\r
-interrupt priority. */\r
-static const UBaseType_t uxInterruptPriorities[ tmrTIMERS_USED ] =\r
-{\r
- configMAX_API_CALL_INTERRUPT_PRIORITY + 1,\r
- configMAX_API_CALL_INTERRUPT_PRIORITY,\r
- configMAX_API_CALL_INTERRUPT_PRIORITY - 1\r
-}\r
-static XTtcPs xTimerInstances[ tmrTIMERS_USED ];\r
-\r
-/* Used to provide a means of ensuring the intended interrupt nesting depth is\r
-actually being reached. */\r
-extern uint32_t ulPortInterruptNesting;\r
-static uint32_t ulMaxRecordedNesting = 0;\r
-\r
-/* For convenience the high frequency timer increments a variable that is then\r
-used as the time base for the run time stats. */\r
-volatile uint32_t ulHighFrequencyTimerCounts = 0;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-void vInitialiseTimerForIntQueueTest( void )\r
-{\r
-BaseType_t xStatus;\r
-TmrCntrSetup *pxTimerSettings;\r
-extern XScuGic xInterruptController;\r
-BaseType_t xTimer;\r
-XTtcPs *pxTimerInstance;\r
-XTtcPs_Config *pxTimerConfiguration;\r
-const uint8_t ucRisingEdge = 3;\r
-\r
- for( xTimer = 0; xTimer < tmrTIMERS_USED; xTimer++ )\r
- {\r
- /* Look up the timer's configuration. */\r
- pxTimerInstance = &( xTimerInstances[ xTimer ] );\r
- pxTimerConfiguration = XTtcPs_LookupConfig( xDeviceIDs[ xTimer ] );\r
- configASSERT( pxTimerConfiguration );\r
-\r
- pxTimerSettings = &( xTimerSettings[ xTimer ] );\r
-\r
- /* Initialise the device. */\r
- xStatus = XTtcPs_CfgInitialize( pxTimerInstance, pxTimerConfiguration, pxTimerConfiguration->BaseAddress );\r
- if( xStatus != XST_SUCCESS )\r
- {\r
- /* Not sure how to do this before XTtcPs_CfgInitialize is called\r
- as pxTimerInstance is set within XTtcPs_CfgInitialize(). */\r
- XTtcPs_Stop( pxTimerInstance );\r
- xStatus = XTtcPs_CfgInitialize( pxTimerInstance, pxTimerConfiguration, pxTimerConfiguration->BaseAddress );\r
- configASSERT( xStatus == XST_SUCCESS );\r
- }\r
-\r
- /* Set the options. */\r
- XTtcPs_SetOptions( pxTimerInstance, pxTimerSettings->Options );\r
-\r
- /* The timer frequency is preset in the pxTimerSettings structure.\r
- Derive the values for the other structure members. */\r
- XTtcPs_CalcIntervalFromFreq( pxTimerInstance, pxTimerSettings->OutputHz, &( pxTimerSettings->Interval ), &( pxTimerSettings->Prescaler ) );\r
-\r
- /* Set the interval and prescale. */\r
- XTtcPs_SetInterval( pxTimerInstance, pxTimerSettings->Interval );\r
- XTtcPs_SetPrescaler( pxTimerInstance, pxTimerSettings->Prescaler );\r
-\r
- /* The priority must be the lowest possible. */\r
- XScuGic_SetPriorityTriggerType( &xInterruptController, xInterruptIDs[ xTimer ], uxInterruptPriorities[ xTimer ] << portPRIORITY_SHIFT, ucRisingEdge );\r
-\r
- /* Connect to the interrupt controller. */\r
- xStatus = XScuGic_Connect( &xInterruptController, xInterruptIDs[ xTimer ], ( Xil_InterruptHandler ) prvTimerHandler, ( void * ) pxTimerInstance );\r
- configASSERT( xStatus == XST_SUCCESS);\r
-\r
- /* Enable the interrupt in the GIC. */\r
- XScuGic_Enable( &xInterruptController, xInterruptIDs[ xTimer ] );\r
-\r
- /* Enable the interrupts in the timer. */\r
- XTtcPs_EnableInterrupts( pxTimerInstance, XTTCPS_IXR_INTERVAL_MASK );\r
-\r
- /* Start the timer. */\r
- XTtcPs_Start( pxTimerInstance );\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvTimerHandler( void *pvCallBackRef )\r
-{\r
-uint32_t ulInterruptStatus;\r
-XTtcPs *pxTimer = ( XTtcPs * ) pvCallBackRef;\r
-BaseType_t xYieldRequired;\r
-\r
- /* Read the interrupt status, then write it back to clear the interrupt. */\r
- ulInterruptStatus = XTtcPs_GetInterruptStatus( pxTimer );\r
- XTtcPs_ClearInterruptStatus( pxTimer, ulInterruptStatus );\r
-\r
- /* Only one interrupt event type is expected. */\r
- configASSERT( ( XTTCPS_IXR_INTERVAL_MASK & ulInterruptStatus ) != 0 );\r
-\r
- /* Check the device ID to know which IntQueue demo to call. */\r
- if( pxTimer->Config.DeviceId == xDeviceIDs[ 0 ] )\r
- {\r
- xYieldRequired = xFirstTimerHandler();\r
- }\r
- else if( pxTimer->Config.DeviceId == xDeviceIDs[ 1 ] )\r
- {\r
- xYieldRequired = xSecondTimerHandler();\r
- }\r
- else\r
- {\r
- /* The high frequency timer is also used to generate the time base for\r
- the run time state. */\r
- ulHighFrequencyTimerCounts++;\r
-\r
- /* Latch the highest interrupt nesting count detected. */\r
- if( ulPortInterruptNesting > ulMaxRecordedNesting )\r
- {\r
- ulMaxRecordedNesting = ulPortInterruptNesting;\r
- }\r
-\r
- xYieldRequired = pdFALSE;\r
- }\r
-\r
- /* If xYieldRequired is not pdFALSE then calling either xFirstTimerHandler()\r
- or xSecondTimerHandler() resulted in a task leaving the blocked state and\r
- the task that left the blocked state had a priority higher than the currently\r
- running task (the task this interrupt interrupted) - so a context switch\r
- should be performed so the interrupt returns directly to the higher priority\r
- task. xYieldRequired is tested inside the following macro. */\r
- portYIELD_FROM_ISR( xYieldRequired );\r
-}\r
-\r
+++ /dev/null
-/*\r
- FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd. \r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that has become a de facto standard. *\r
- * *\r
- * Help yourself get started quickly and support the FreeRTOS *\r
- * project by purchasing a FreeRTOS tutorial book, reference *\r
- * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
- * *\r
- * Thank you! *\r
- * *\r
- ***************************************************************************\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
-\r
- >>! NOTE: The modification to the GPL is included to allow you to distribute\r
- >>! a combined work that includes FreeRTOS without being obliged to provide\r
- >>! the source code for proprietary components outside of the FreeRTOS\r
- >>! kernel.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- 1 tab == 4 spaces!\r
-\r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
- license and Real Time Engineers Ltd. contact details.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-#ifndef INT_QUEUE_TIMER_H\r
-#define INT_QUEUE_TIMER_H\r
-\r
-void vInitialiseTimerForIntQueueTest( void );\r
-portBASE_TYPE xTimer0Handler( void );\r
-portBASE_TYPE xTimer1Handler( void );\r
-\r
-#endif\r
-\r
* This file implements the code that is not demo specific, including the
* hardware setup and FreeRTOS hook functions.
*
+ * NOTE: The full demo includes a test that checks the floating point context
+ * is maintained correctly across task switches. The standard GCC libraries can
+ * use floating point registers and made this test fail (unless the tasks that
+ * use the library are given a floating point context as described on the
+ * documentation page for this demo). printf-stdarg.c is included in this
+ * project to prevent the standard GCC libraries being linked into the project.
+ *
* ENSURE TO READ THE DOCUMENTATION PAGE FOR THIS PORT AND DEMO APPLICATION ON
* THE http://www.FreeRTOS.org WEB SITE FOR FULL INFORMATION ON USING THIS DEMO
* APPLICATION, AND ITS ASSOCIATE FreeRTOS ARCHITECTURE PORT!
void vApplicationStackOverflowHook( xTaskHandle pxTask, char *pcTaskName );
void vApplicationTickHook( void );
+/*-----------------------------------------------------------*/
+
+/* The interrupt controller is initialised in this file, and made available to
+other modules. */
XScuGic xInterruptController;
/*-----------------------------------------------------------*/
}
#endif
+ /* Don't expect to reach here. */
return 0;
}
/*-----------------------------------------------------------*/
+++ /dev/null
-/*\r
- FreeRTOS V8.0.0:rc2 - Copyright (C) 2014 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that has become a de facto standard. *\r
- * *\r
- * Help yourself get started quickly and support the FreeRTOS *\r
- * project by purchasing a FreeRTOS tutorial book, reference *\r
- * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
- * *\r
- * Thank you! *\r
- * *\r
- ***************************************************************************\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
-\r
- >>! NOTE: The modification to the GPL is included to allow you to distribute\r
- >>! a combined work that includes FreeRTOS without being obliged to provide\r
- >>! the source code for proprietary components outside of the FreeRTOS\r
- >>! kernel.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- 1 tab == 4 spaces!\r
-\r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
- license and Real Time Engineers Ltd. contact details.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/******************************************************************************\r
- * NOTE 1: This project provides two demo applications. A simple blinky style\r
- * project, and a more comprehensive test and demo application. The\r
- * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
- * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
- * in main.c. This file implements the simply blinky style version.\r
- *\r
- * NOTE 2: This file only contains the source code that is specific to the\r
- * basic demo. Generic functions, such FreeRTOS hook functions, and functions\r
- * required to configure the hardware are defined in main.c.\r
- ******************************************************************************\r
- *\r
- * main_blinky() creates one queue, and two tasks. It then starts the\r
- * scheduler.\r
- *\r
- * The Queue Send Task:\r
- * The queue send task is implemented by the prvQueueSendTask() function in\r
- * this file. prvQueueSendTask() sits in a loop that causes it to repeatedly\r
- * block for 200 milliseconds, before sending the value 100 to the queue that\r
- * was created within main_blinky(). Once the value is sent, the task loops\r
- * back around to block for another 200 milliseconds...and so on.\r
- *\r
- * The Queue Receive Task:\r
- * The queue receive task is implemented by the prvQueueReceiveTask() function\r
- * in this file. prvQueueReceiveTask() sits in a loop where it repeatedly\r
- * blocks on attempts to read data from the queue that was created within\r
- * main_blinky(). When data is received, the task checks the value of the\r
- * data, and if the value equals the expected 100, toggles an LED. The 'block\r
- * time' parameter passed to the queue receive function specifies that the\r
- * task should be held in the Blocked state indefinitely to wait for data to\r
- * be available on the queue. The queue receive task will only leave the\r
- * Blocked state when the queue send task writes to the queue. As the queue\r
- * send task writes to the queue every 200 milliseconds, the queue receive\r
- * task leaves the Blocked state every 200 milliseconds, and therefore toggles\r
- * the LED every 200 milliseconds.\r
- */\r
-\r
-/* Kernel includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-#include "semphr.h"\r
-\r
-/* Standard demo includes. */\r
-#include "partest.h"\r
-\r
-/* Priorities at which the tasks are created. */\r
-#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
-\r
-/* The rate at which data is sent to the queue. The 200ms value is converted\r
-to ticks using the portTICK_RATE_MS constant. */\r
-#define mainQUEUE_SEND_FREQUENCY_MS ( 200 / portTICK_RATE_MS )\r
-\r
-/* The number of items the queue can hold. This is 1 as the receive task\r
-will remove items as they are added, meaning the send task should always find\r
-the queue empty. */\r
-#define mainQUEUE_LENGTH ( 1 )\r
-\r
-/* The LED toggled by the Rx task. */\r
-#define mainTASK_LED ( 0 )\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * The tasks as described in the comments at the top of this file.\r
- */\r
-static void prvQueueReceiveTask( void *pvParameters );\r
-static void prvQueueSendTask( void *pvParameters );\r
-\r
-/*\r
- * Called by main() to create the simply blinky style application if\r
- * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
- */\r
-void main_blinky( void );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* The queue used by both tasks. */\r
-static xQueueHandle xQueue = NULL;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-void main_blinky( void )\r
-{\r
- /* Create the queue. */\r
- xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) );\r
-\r
- if( xQueue != NULL )\r
- {\r
- /* Start the two tasks as described in the comments at the top of this\r
- file. */\r
- xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */\r
- "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */\r
- configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */\r
- NULL, /* The parameter passed to the task - not used in this case. */\r
- mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */\r
- NULL ); /* The task handle is not required, so NULL is passed. */\r
-\r
- xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL );\r
-\r
- /* Start the tasks and timer running. */\r
- vTaskStartScheduler();\r
- }\r
-\r
- /* If all is well, the scheduler will now be running, and the following\r
- line will never be reached. If the following line does execute, then\r
- there was either insufficient FreeRTOS heap memory available for the idle\r
- and/or timer tasks to be created, or vTaskStartScheduler() was called from\r
- User mode. See the memory management section on the FreeRTOS web site for\r
- more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The\r
- mode from which main() is called is set in the C start up code and must be\r
- a privileged mode (not user mode). */\r
- for( ;; );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvQueueSendTask( void *pvParameters )\r
-{\r
-portTickType xNextWakeTime;\r
-const unsigned long ulValueToSend = 100UL;\r
-\r
- /* Remove compiler warning about unused parameter. */\r
- ( void ) pvParameters;\r
-\r
- /* Initialise xNextWakeTime - this only needs to be done once. */\r
- xNextWakeTime = xTaskGetTickCount();\r
-\r
- for( ;; )\r
- {\r
- /* Place this task in the blocked state until it is time to run again. */\r
- vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );\r
-\r
- /* Send to the queue - causing the queue receive task to unblock and\r
- toggle the LED. 0 is used as the block time so the sending operation\r
- will not block - it shouldn't need to block as the queue should always\r
- be empty at this point in the code. */\r
- xQueueSend( xQueue, &ulValueToSend, 0U );\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvQueueReceiveTask( void *pvParameters )\r
-{\r
-unsigned long ulReceivedValue;\r
-const unsigned long ulExpectedValue = 100UL;\r
-\r
- /* Remove compiler warning about unused parameter. */\r
- ( void ) pvParameters;\r
-\r
- for( ;; )\r
- {\r
- /* Wait until something arrives in the queue - this task will block\r
- indefinitely provided INCLUDE_vTaskSuspend is set to 1 in\r
- FreeRTOSConfig.h. */\r
- xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );\r
-\r
- /* To get here something must have been received from the queue, but\r
- is it the expected value? If it is, toggle the LED. */\r
- if( ulReceivedValue == ulExpectedValue )\r
- {\r
- vParTestToggleLED( mainTASK_LED );\r
- ulReceivedValue = 0U;\r
- }\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
+++ /dev/null
-/*\r
- FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that has become a de facto standard. *\r
- * *\r
- * Help yourself get started quickly and support the FreeRTOS *\r
- * project by purchasing a FreeRTOS tutorial book, reference *\r
- * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
- * *\r
- * Thank you! *\r
- * *\r
- ***************************************************************************\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
-\r
- >>! NOTE: The modification to the GPL is included to allow you to distribute\r
- >>! a combined work that includes FreeRTOS without being obliged to provide\r
- >>! the source code for proprietary components outside of the FreeRTOS\r
- >>! kernel.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- 1 tab == 4 spaces!\r
-\r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
- license and Real Time Engineers Ltd. contact details.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/******************************************************************************\r
- * NOTE 1: This project provides two demo applications. A simple blinky style\r
- * project, and a more comprehensive test and demo application. The\r
- * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
- * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
- * in main.c. This file implements the comprehensive test and demo version.\r
- *\r
- * NOTE 2: This file only contains the source code that is specific to the\r
- * full demo. Generic functions, such FreeRTOS hook functions, and functions\r
- * required to configure the hardware, are defined in main.c.\r
- *\r
- ******************************************************************************\r
- *\r
- * main_full() creates all the demo application tasks and software timers, then\r
- * starts the scheduler. The web documentation provides more details of the\r
- * standard demo application tasks, which provide no particular functionality,\r
- * but do provide a good example of how to use the FreeRTOS API.\r
- *\r
- * In addition to the standard demo tasks, the following tasks and tests are\r
- * defined and/or created within this file:\r
- *\r
- * FreeRTOS+CLI command console. The command console is access through UART2\r
- * using 115200 baud if mainINCLUDE_FAT_SL_DEMO is set to 1. For reasons of\r
- * robustness testing the UART driver is deliberately written to be inefficient\r
- * and should not be used as a template for a production driver. Type "help" to\r
- * see a list of registered commands. The FreeRTOS+CLI license is different to\r
- * the FreeRTOS license, see http://www.FreeRTOS.org/cli for license and usage\r
- * details.\r
- *\r
- * FreeRTOS+FAT SL. FreeRTOS+FAT SL is demonstrated using a RAM disk if\r
- * mainINCLUDE_FAT_SL_DEMO is set to 1. [At the time of writing] The\r
- * functionality of the file system demo is identical to the functionality of\r
- * the FreeRTOS Win32 simulator file system demo, with the command console being\r
- * accessed via the UART (as described above) instead of a network terminal.\r
- * The FreeRTOS+FAT SL license is different to the FreeRTOS license, see\r
- * http://www.FreeRTOS.org/fat_sl for license and usage details, and a\r
- * description of the file system demo functionality.\r
- *\r
- * "Reg test" tasks - These fill both the core and floating point registers with\r
- * known values, then check that each register maintains its expected value for\r
- * the lifetime of the task. Each task uses a different set of values. The reg\r
- * test tasks execute with a very low priority, so get preempted very\r
- * frequently. A register containing an unexpected value is indicative of an\r
- * error in the context switching mechanism.\r
- *\r
- * "Check" task - The check task period is initially set to three seconds. The\r
- * task checks that all the standard demo tasks, and the register check tasks,\r
- * are not only still executing, but are executing without reporting any errors.\r
- * If the check task discovers that a task has either stalled, or reported an\r
- * error, then it changes its own execution period from the initial three\r
- * seconds, to just 200ms. The check task also toggles an LED each time it is\r
- * called. This provides a visual indication of the system status: If the LED\r
- * toggles every three seconds, then no issues have been discovered. If the LED\r
- * toggles every 200ms, then an issue has been discovered with at least one\r
- * task.\r
- */\r
-\r
-/* Standard includes. */\r
-#include <stdio.h>\r
-\r
-/* Kernel includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-#include "timers.h"\r
-#include "semphr.h"\r
-\r
-/* Standard demo application includes. */\r
-#include "flop.h"\r
-#include "semtest.h"\r
-#include "dynamic.h"\r
-#include "BlockQ.h"\r
-#include "blocktim.h"\r
-#include "countsem.h"\r
-#include "GenQTest.h"\r
-#include "recmutex.h"\r
-#include "death.h"\r
-#include "partest.h"\r
-#include "comtest2.h"\r
-#include "serial.h"\r
-#include "TimerDemo.h"\r
-#include "QueueOverwrite.h"\r
-#include "IntQueue.h"\r
-\r
-/* FreeRTOS+CLI and FreeRTOS+FAT SL includes. */\r
-//#include "UARTCommandConsole.h"\r
-\r
-/* Priorities for the demo application tasks. */\r
-#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )\r
-#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )\r
-#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )\r
-#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
-#define mainUART_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3UL )\r
-#define mainCOM_TEST_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )\r
-#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY )\r
-\r
-/* The priority used by the UART command console task. */\r
-#define mainUART_COMMAND_CONSOLE_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )\r
-\r
-/* The LED used by the check timer. */\r
-#define mainCHECK_LED ( 0 )\r
-\r
-/* A block time of zero simply means "don't block". */\r
-#define mainDONT_BLOCK ( 0UL )\r
-\r
-/* In this example the baud rate is hard coded and there is no LED for use by\r
-the COM test tasks, so just set both to invalid values. */\r
-#define mainCOM_TEST_LED ( 100 )\r
-#define mainBAUD_RATE ( 0 )\r
-\r
-/* The period after which the check timer will expire, in ms, provided no errors\r
-have been reported by any of the standard demo tasks. ms are converted to the\r
-equivalent in ticks using the portTICK_RATE_MS constant. */\r
-#define mainNO_ERROR_CHECK_TASK_PERIOD ( 3000UL / portTICK_RATE_MS )\r
-\r
-/* The period at which the check timer will expire, in ms, if an error has been\r
-reported in one of the standard demo tasks. ms are converted to the equivalent\r
-in ticks using the portTICK_RATE_MS constant. */\r
-#define mainERROR_CHECK_TASK_PERIOD ( 200UL / portTICK_RATE_MS )\r
-\r
-/* Parameters that are passed into the register check tasks solely for the\r
-purpose of ensuring parameters are passed into tasks correctly. */\r
-#define mainREG_TEST_TASK_1_PARAMETER ( ( void * ) 0x12345678 )\r
-#define mainREG_TEST_TASK_2_PARAMETER ( ( void * ) 0x87654321 )\r
-\r
-/* The base period used by the timer test tasks. */\r
-#define mainTIMER_TEST_PERIOD ( 50 )\r
-\r
-/* The length of queues used to pass characters into and out of the UART\r
-interrupt. Note the comments above about the UART driver being implemented in\r
-this way to test the kernel robustness rather than to provide a template for an\r
-efficient production driver. */\r
-#define mainUART_QUEUE_LENGTHS 10\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * Called by main() to run the full demo (as opposed to the blinky demo) when\r
- * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0.\r
- */\r
-void main_full( void );\r
-\r
-/*\r
- * The check task, as described at the top of this file.\r
- */\r
-static void prvCheckTask( void *pvParameters );\r
-\r
-/*\r
- * Register check tasks, and the tasks used to write over and check the contents\r
- * of the FPU registers, as described at the top of this file. The nature of\r
- * these files necessitates that they are written in an assembly file, but the\r
- * entry points are kept in the C file for the convenience of checking the task\r
- * parameter.\r
- */\r
-static void prvRegTestTaskEntry1( void *pvParameters );\r
-extern void vRegTest1Implementation( void );\r
-static void prvRegTestTaskEntry2( void *pvParameters );\r
-extern void vRegTest2Implementation( void );\r
-\r
-/*\r
- * Register commands that can be used with FreeRTOS+CLI. The commands are\r
- * defined in CLI-Commands.c and File-Related-CLI-Command.c respectively.\r
- */\r
-extern void vRegisterSampleCLICommands( void );\r
-\r
-/*\r
- * The task that manages the FreeRTOS+CLI input and output.\r
- */\r
-extern void vUARTCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* The following two variables are used to communicate the status of the\r
-register check tasks to the check software timer. If the variables keep\r
-incrementing, then the register check tasks has not discovered any errors. If\r
-a variable stops incrementing, then an error has been found. */\r
-volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-void main_full( void )\r
-{\r
- /* Start all the other standard demo/test tasks. The have not particular\r
- functionality, but do demonstrate how to use the FreeRTOS API and test the\r
- kernel port. */\r
- vStartInterruptQueueTasks();\r
- vStartDynamicPriorityTasks();\r
- vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
- vCreateBlockTimeTasks();\r
- vStartCountingSemaphoreTasks();\r
- vStartGenericQueueTasks( tskIDLE_PRIORITY );\r
- vStartRecursiveMutexTasks();\r
- vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
- vStartMathTasks( mainFLOP_TASK_PRIORITY );\r
- vStartTimerDemoTask( mainTIMER_TEST_PERIOD );\r
- vStartQueueOverwriteTask( mainQUEUE_OVERWRITE_PRIORITY );\r
-\r
- /* Start the tasks that implements the command console on the UART, as\r
- described above. */\r
- vUARTCommandConsoleStart( mainUART_COMMAND_CONSOLE_STACK_SIZE, mainUART_COMMAND_CONSOLE_TASK_PRIORITY );\r
-\r
- /* Register the standard CLI commands. */\r
- vRegisterSampleCLICommands();\r
-\r
-\r
- /* Create the register check tasks, as described at the top of this\r
- file */\r
- xTaskCreate( prvRegTestTaskEntry1, "Reg1", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_1_PARAMETER, tskIDLE_PRIORITY, NULL );\r
- xTaskCreate( prvRegTestTaskEntry2, "Reg2", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_2_PARAMETER, tskIDLE_PRIORITY, NULL );\r
-\r
- /* Create the task that performs the 'check' functionality, as described at\r
- the top of this file. */\r
- xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
-\r
- /* The set of tasks created by the following function call have to be\r
- created last as they keep account of the number of tasks they expect to see\r
- running. */\r
- vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
-\r
- /* Start the scheduler. */\r
- vTaskStartScheduler();\r
-\r
- /* If all is well, the scheduler will now be running, and the following\r
- line will never be reached. If the following line does execute, then\r
- there was either insufficient FreeRTOS heap memory available for the idle\r
- and/or timer tasks to be created, or vTaskStartScheduler() was called from\r
- User mode. See the memory management section on the FreeRTOS web site for\r
- more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The\r
- mode from which main() is called is set in the C start up code and must be\r
- a privileged mode (not user mode). */\r
- for( ;; );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvCheckTask( void *pvParameters )\r
-{\r
-portTickType xDelayPeriod = mainNO_ERROR_CHECK_TASK_PERIOD;\r
-portTickType xLastExecutionTime;\r
-static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;\r
-unsigned long ulErrorFound = pdFALSE;\r
-\r
- /* Just to stop compiler warnings. */\r
- ( void ) pvParameters;\r
-\r
- /* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()\r
- works correctly. */\r
- xLastExecutionTime = xTaskGetTickCount();\r
-\r
- /* Cycle for ever, delaying then checking all the other tasks are still\r
- operating without error. The onboard LED is toggled on each iteration.\r
- If an error is detected then the delay period is decreased from\r
- mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD. This has the\r
- effect of increasing the rate at which the onboard LED toggles, and in so\r
- doing gives visual feedback of the system status. */\r
- for( ;; )\r
- {\r
- /* Delay until it is time to execute again. */\r
- vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod );\r
-\r
- /* Check all the demo tasks (other than the flash tasks) to ensure\r
- that they are all still running, and that none have detected an error. */\r
- if( xAreIntQueueTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if( xAreMathsTaskStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if ( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if( xIsCreateTaskStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if( xAreTimerDemoTasksStillRunning( ( portTickType ) mainNO_ERROR_CHECK_TASK_PERIOD ) != pdPASS )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if( xIsQueueOverwriteTaskStillRunning() != pdPASS )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- /* Check that the register test 1 task is still running. */\r
- if( ulLastRegTest1Value == ulRegTest1LoopCounter )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
- ulLastRegTest1Value = ulRegTest1LoopCounter;\r
-\r
- /* Check that the register test 2 task is still running. */\r
- if( ulLastRegTest2Value == ulRegTest2LoopCounter )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
- ulLastRegTest2Value = ulRegTest2LoopCounter;\r
-\r
- /* Toggle the check LED to give an indication of the system status. If\r
- the LED toggles every mainNO_ERROR_CHECK_TASK_PERIOD milliseconds then\r
- everything is ok. A faster toggle indicates an error. */\r
- vParTestToggleLED( mainCHECK_LED );\r
-\r
- if( ulErrorFound != pdFALSE )\r
- {\r
- /* An error has been detected in one of the tasks - flash the LED\r
- at a higher frequency to give visible feedback that something has\r
- gone wrong (it might just be that the loop back connector required\r
- by the comtest tasks has not been fitted). */\r
- xDelayPeriod = mainERROR_CHECK_TASK_PERIOD;\r
- }\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvRegTestTaskEntry1( void *pvParameters )\r
-{\r
- /* Although the regtest task is written in assembler, its entry point is\r
- written in C for convenience of checking the task parameter is being passed\r
- in correctly. */\r
- if( pvParameters == mainREG_TEST_TASK_1_PARAMETER )\r
- {\r
- /* The reg test task also tests the floating point registers. Tasks\r
- that use the floating point unit must call vPortTaskUsesFPU() before\r
- any floating point instructions are executed. */\r
- vPortTaskUsesFPU();\r
-\r
- /* Start the part of the test that is written in assembler. */\r
- vRegTest1Implementation();\r
- }\r
-\r
- /* The following line will only execute if the task parameter is found to\r
- be incorrect. The check timer will detect that the regtest loop counter is\r
- not being incremented and flag an error. */\r
- vTaskDelete( NULL );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvRegTestTaskEntry2( void *pvParameters )\r
-{\r
- /* Although the regtest task is written in assembler, its entry point is\r
- written in C for convenience of checking the task parameter is being passed\r
- in correctly. */\r
- if( pvParameters == mainREG_TEST_TASK_2_PARAMETER )\r
- {\r
- /* The reg test task also tests the floating point registers. Tasks\r
- that use the floating point unit must call vPortTaskUsesFPU() before\r
- any floating point instructions are executed. */\r
- vPortTaskUsesFPU();\r
-\r
- /* Start the part of the test that is written in assembler. */\r
- vRegTest2Implementation();\r
- }\r
-\r
- /* The following line will only execute if the task parameter is found to\r
- be incorrect. The check timer will detect that the regtest loop counter is\r
- not being incremented and flag an error. */\r
- vTaskDelete( NULL );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-\r
-\r
-\r
--- /dev/null
+/*\r
+ Copyright 2001, 2002 Georges Menie (www.menie.org)\r
+ stdarg version contributed by Christian Ettinger\r
+\r
+ This program is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU Lesser General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ This program is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU Lesser General Public License for more details.\r
+\r
+ You should have received a copy of the GNU Lesser General Public License\r
+ along with this program; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+*/\r
+\r
+/*\r
+ putchar is the only external dependency for this file,\r
+ if you have a working putchar, leave it commented out.\r
+ If not, uncomment the define below and\r
+ replace outbyte(c) by your own function call.\r
+\r
+*/\r
+\r
+#define putchar(c) c\r
+\r
+#include <stdarg.h>\r
+\r
+static void printchar(char **str, int c)\r
+{\r
+ //extern int putchar(int c);\r
+ \r
+ if (str) {\r
+ **str = (char)c;\r
+ ++(*str);\r
+ }\r
+ else\r
+ { \r
+ (void)putchar(c);\r
+ }\r
+}\r
+\r
+#define PAD_RIGHT 1\r
+#define PAD_ZERO 2\r
+\r
+static int prints(char **out, const char *string, int width, int pad)\r
+{\r
+ register int pc = 0, padchar = ' ';\r
+\r
+ if (width > 0) {\r
+ register int len = 0;\r
+ register const char *ptr;\r
+ for (ptr = string; *ptr; ++ptr) ++len;\r
+ if (len >= width) width = 0;\r
+ else width -= len;\r
+ if (pad & PAD_ZERO) padchar = '0';\r
+ }\r
+ if (!(pad & PAD_RIGHT)) {\r
+ for ( ; width > 0; --width) {\r
+ printchar (out, padchar);\r
+ ++pc;\r
+ }\r
+ }\r
+ for ( ; *string ; ++string) {\r
+ printchar (out, *string);\r
+ ++pc;\r
+ }\r
+ for ( ; width > 0; --width) {\r
+ printchar (out, padchar);\r
+ ++pc;\r
+ }\r
+\r
+ return pc;\r
+}\r
+\r
+/* the following should be enough for 32 bit int */\r
+#define PRINT_BUF_LEN 12\r
+\r
+static int printi(char **out, int i, int b, int sg, int width, int pad, int letbase)\r
+{\r
+ char print_buf[PRINT_BUF_LEN];\r
+ register char *s;\r
+ register int t, neg = 0, pc = 0;\r
+ register unsigned int u = (unsigned int)i;\r
+\r
+ if (i == 0) {\r
+ print_buf[0] = '0';\r
+ print_buf[1] = '\0';\r
+ return prints (out, print_buf, width, pad);\r
+ }\r
+\r
+ if (sg && b == 10 && i < 0) {\r
+ neg = 1;\r
+ u = (unsigned int)-i;\r
+ }\r
+\r
+ s = print_buf + PRINT_BUF_LEN-1;\r
+ *s = '\0';\r
+\r
+ while (u) {\r
+ t = (unsigned int)u % b;\r
+ if( t >= 10 )\r
+ t += letbase - '0' - 10;\r
+ *--s = (char)(t + '0');\r
+ u /= b;\r
+ }\r
+\r
+ if (neg) {\r
+ if( width && (pad & PAD_ZERO) ) {\r
+ printchar (out, '-');\r
+ ++pc;\r
+ --width;\r
+ }\r
+ else {\r
+ *--s = '-';\r
+ }\r
+ }\r
+\r
+ return pc + prints (out, s, width, pad);\r
+}\r
+\r
+static int print( char **out, const char *format, va_list args )\r
+{\r
+ register int width, pad;\r
+ register int pc = 0;\r
+ char scr[2];\r
+\r
+ for (; *format != 0; ++format) {\r
+ if (*format == '%') {\r
+ ++format;\r
+ width = pad = 0;\r
+ if (*format == '\0') break;\r
+ if (*format == '%') goto out;\r
+ if (*format == '-') {\r
+ ++format;\r
+ pad = PAD_RIGHT;\r
+ }\r
+ while (*format == '0') {\r
+ ++format;\r
+ pad |= PAD_ZERO;\r
+ }\r
+ for ( ; *format >= '0' && *format <= '9'; ++format) {\r
+ width *= 10;\r
+ width += *format - '0';\r
+ }\r
+ if( *format == 's' ) {\r
+ register char *s = (char *)va_arg( args, int );\r
+ pc += prints (out, s?s:"(null)", width, pad);\r
+ continue;\r
+ }\r
+ if( *format == 'd' ) {\r
+ pc += printi (out, va_arg( args, int ), 10, 1, width, pad, 'a');\r
+ continue;\r
+ }\r
+ if( *format == 'x' ) {\r
+ pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'a');\r
+ continue;\r
+ }\r
+ if( *format == 'X' ) {\r
+ pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'A');\r
+ continue;\r
+ }\r
+ if( *format == 'u' ) {\r
+ pc += printi (out, va_arg( args, int ), 10, 0, width, pad, 'a');\r
+ continue;\r
+ }\r
+ if( *format == 'c' ) {\r
+ /* char are converted to int then pushed on the stack */\r
+ scr[0] = (char)va_arg( args, int );\r
+ scr[1] = '\0';\r
+ pc += prints (out, scr, width, pad);\r
+ continue;\r
+ }\r
+ }\r
+ else {\r
+ out:\r
+ printchar (out, *format);\r
+ ++pc;\r
+ }\r
+ }\r
+ if (out) **out = '\0';\r
+ va_end( args );\r
+ return pc;\r
+}\r
+\r
+int printf(const char *format, ...)\r
+{\r
+ va_list args;\r
+ \r
+ va_start( args, format );\r
+ return print( 0, format, args );\r
+}\r
+\r
+int sprintf(char *out, const char *format, ...)\r
+{\r
+ va_list args;\r
+ \r
+ va_start( args, format );\r
+ return print( &out, format, args );\r
+}\r
+\r
+\r
+int snprintf( char *buf, unsigned int count, const char *format, ... )\r
+{\r
+ va_list args;\r
+ \r
+ ( void ) count;\r
+ \r
+ va_start( args, format );\r
+ return print( &buf, format, args );\r
+}\r
+\r
+\r
+#ifdef TEST_PRINTF\r
+int main(void)\r
+{\r
+ char *ptr = "Hello world!";\r
+ char *np = 0;\r
+ int i = 5;\r
+ unsigned int bs = sizeof(int)*8;\r
+ int mi;\r
+ char buf[80];\r
+\r
+ mi = (1 << (bs-1)) + 1;\r
+ printf("%s\n", ptr);\r
+ printf("printf test\n");\r
+ printf("%s is null pointer\n", np);\r
+ printf("%d = 5\n", i);\r
+ printf("%d = - max int\n", mi);\r
+ printf("char %c = 'a'\n", 'a');\r
+ printf("hex %x = ff\n", 0xff);\r
+ printf("hex %02x = 00\n", 0);\r
+ printf("signed %d = unsigned %u = hex %x\n", -3, -3, -3);\r
+ printf("%d %s(s)%", 0, "message");\r
+ printf("\n");\r
+ printf("%d %s(s) with %%\n", 0, "message");\r
+ sprintf(buf, "justif: \"%-10s\"\n", "left"); printf("%s", buf);\r
+ sprintf(buf, "justif: \"%10s\"\n", "right"); printf("%s", buf);\r
+ sprintf(buf, " 3: %04d zero padded\n", 3); printf("%s", buf);\r
+ sprintf(buf, " 3: %-4d left justif.\n", 3); printf("%s", buf);\r
+ sprintf(buf, " 3: %4d right justif.\n", 3); printf("%s", buf);\r
+ sprintf(buf, "-3: %04d zero padded\n", -3); printf("%s", buf);\r
+ sprintf(buf, "-3: %-4d left justif.\n", -3); printf("%s", buf);\r
+ sprintf(buf, "-3: %4d right justif.\n", -3); printf("%s", buf);\r
+\r
+ return 0;\r
+}\r
+\r
+/*\r
+ * if you compile this file with\r
+ * gcc -Wall $(YOUR_C_OPTIONS) -DTEST_PRINTF -c printf.c\r
+ * you will get a normal warning:\r
+ * printf.c:214: warning: spurious trailing `%' in format\r
+ * this line is testing an invalid % at the end of the format string.\r
+ *\r
+ * this should display (on 32bit int machine) :\r
+ *\r
+ * Hello world!\r
+ * printf test\r
+ * (null) is null pointer\r
+ * 5 = 5\r
+ * -2147483647 = - max int\r
+ * char a = 'a'\r
+ * hex ff = ff\r
+ * hex 00 = 00\r
+ * signed -3 = unsigned 4294967293 = hex fffffffd\r
+ * 0 message(s)\r
+ * 0 message(s) with %\r
+ * justif: "left "\r
+ * justif: " right"\r
+ * 3: 0003 zero padded\r
+ * 3: 3 left justif.\r
+ * 3: 3 right justif.\r
+ * -3: -003 zero padded\r
+ * -3: -3 left justif.\r
+ * -3: -3 right justif.\r
+ */\r
+\r
+#endif\r
+\r
+\r
+/* To keep linker happy. */\r
+int write( int i, char* c, int n)\r
+{\r
+ (void)i;\r
+ (void)n;\r
+ (void)c;\r
+ return 0;\r
+}\r
+\r
+++ /dev/null
-/*\r
- FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
-\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
- * *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
- * *\r
- ***************************************************************************\r
-\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
-\r
- >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
- details. You should have received a copy of the GNU General Public License\r
- and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
- viewed here: http://www.freertos.org/a00114.html and also obtained by\r
- writing to Real Time Engineers Ltd., contact details for whom are available\r
- on the FreeRTOS WEB site.\r
-\r
- 1 tab == 4 spaces!\r
-\r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
- license and Real Time Engineers Ltd. contact details.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
- fully thread aware and reentrant UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
- Integrity Systems, who sell the code with commercial support,\r
- indemnification and middleware, under the OpenRTOS brand.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-*/\r
-\r
- .global vRegTest1Implementation\r
- .global vRegTest2Implementation\r
- .extern ulRegTest1LoopCounter\r
- .extern ulRegTest2LoopCounter\r
-\r
- .text\r
- .arm\r
-\r
- /* This function is explained in the comments at the top of main-full.c. */\r
-vRegTest1Implementation:\r
-\r
- /* Fill each general purpose register with a known value. */\r
- mov r0, #0xFF\r
- mov r1, #0x11\r
- mov r2, #0x22\r
- mov r3, #0x33\r
- mov r4, #0x44\r
- mov r5, #0x55\r
- mov r6, #0x66\r
- mov r7, #0x77\r
- mov r8, #0x88\r
- mov r9, #0x99\r
- mov r10, #0xAA\r
- mov r11, #0xBB\r
- mov r12, #0xCC\r
- mov r14, #0xEE\r
-\r
- /* Fill each FPU register with a known value. */\r
- vmov d0, r0, r1\r
- vmov d1, r2, r3\r
- vmov d2, r4, r5\r
- vmov d3, r6, r7\r
- vmov d4, r8, r9\r
- vmov d5, r10, r11\r
- vmov d6, r0, r1\r
- vmov d7, r2, r3\r
- vmov d8, r4, r5\r
- vmov d9, r6, r7\r
- vmov d10, r8, r9\r
- vmov d11, r10, r11\r
- vmov d12, r0, r1\r
- vmov d13, r2, r3\r
- vmov d14, r4, r5\r
- vmov d15, r6, r7\r
-\r
- vmov d16, r0, r1\r
- vmov d17, r2, r3\r
- vmov d18, r4, r5\r
- vmov d19, r6, r7\r
- vmov d20, r8, r9\r
- vmov d21, r10, r11\r
- vmov d22, r0, r1\r
- vmov d23, r2, r3\r
- vmov d24, r4, r5\r
- vmov d25, r6, r7\r
- vmov d26, r8, r9\r
- vmov d27, r10, r11\r
- vmov d28, r0, r1\r
- vmov d29, r2, r3\r
- vmov d30, r4, r5\r
- vmov d31, r6, r7\r
-\r
- /* Loop, checking each itteration that each register still contains the\r
- expected value. */\r
-reg1_loop:\r
- /* Yield to increase test coverage */\r
- svc 0\r
-\r
- /* Check all the VFP registers still contain the values set above.\r
- First save registers that are clobbered by the test. */\r
- push { r0-r1 }\r
-\r
- vmov r0, r1, d0\r
- cmp r0, #0xFF\r
- bne reg1_error_loopf\r
- cmp r1, #0x11\r
- bne reg1_error_loopf\r
- vmov r0, r1, d1\r
- cmp r0, #0x22\r
- bne reg1_error_loopf\r
- cmp r1, #0x33\r
- bne reg1_error_loopf\r
- vmov r0, r1, d2\r
- cmp r0, #0x44\r
- bne reg1_error_loopf\r
- cmp r1, #0x55\r
- bne reg1_error_loopf\r
- vmov r0, r1, d3\r
- cmp r0, #0x66\r
- bne reg1_error_loopf\r
- cmp r1, #0x77\r
- bne reg1_error_loopf\r
- vmov r0, r1, d4\r
- cmp r0, #0x88\r
- bne reg1_error_loopf\r
- cmp r1, #0x99\r
- bne reg1_error_loopf\r
- vmov r0, r1, d5\r
- cmp r0, #0xAA\r
- bne reg1_error_loopf\r
- cmp r1, #0xBB\r
- bne reg1_error_loopf\r
- vmov r0, r1, d6\r
- cmp r0, #0xFF\r
- bne reg1_error_loopf\r
- cmp r1, #0x11\r
- bne reg1_error_loopf\r
- vmov r0, r1, d7\r
- cmp r0, #0x22\r
- bne reg1_error_loopf\r
- cmp r1, #0x33\r
- bne reg1_error_loopf\r
- vmov r0, r1, d8\r
- cmp r0, #0x44\r
- bne reg1_error_loopf\r
- cmp r1, #0x55\r
- bne reg1_error_loopf\r
- vmov r0, r1, d9\r
- cmp r0, #0x66\r
- bne reg1_error_loopf\r
- cmp r1, #0x77\r
- bne reg1_error_loopf\r
- vmov r0, r1, d10\r
- cmp r0, #0x88\r
- bne reg1_error_loopf\r
- cmp r1, #0x99\r
- bne reg1_error_loopf\r
- vmov r0, r1, d11\r
- cmp r0, #0xAA\r
- bne reg1_error_loopf\r
- cmp r1, #0xBB\r
- bne reg1_error_loopf\r
- vmov r0, r1, d12\r
- cmp r0, #0xFF\r
- bne reg1_error_loopf\r
- cmp r1, #0x11\r
- bne reg1_error_loopf\r
- vmov r0, r1, d13\r
- cmp r0, #0x22\r
- bne reg1_error_loopf\r
- cmp r1, #0x33\r
- bne reg1_error_loopf\r
- vmov r0, r1, d14\r
- cmp r0, #0x44\r
- bne reg1_error_loopf\r
- cmp r1, #0x55\r
- bne reg1_error_loopf\r
- vmov r0, r1, d15\r
- cmp r0, #0x66\r
- bne reg1_error_loopf\r
- cmp r1, #0x77\r
- bne reg1_error_loopf\r
-\r
- vmov r0, r1, d16\r
- cmp r0, #0xFF\r
- bne reg1_error_loopf\r
- cmp r1, #0x11\r
- bne reg1_error_loopf\r
- vmov r0, r1, d17\r
- cmp r0, #0x22\r
- bne reg1_error_loopf\r
- cmp r1, #0x33\r
- bne reg1_error_loopf\r
- vmov r0, r1, d18\r
- cmp r0, #0x44\r
- bne reg1_error_loopf\r
- cmp r1, #0x55\r
- bne reg1_error_loopf\r
- vmov r0, r1, d19\r
- cmp r0, #0x66\r
- bne reg1_error_loopf\r
- cmp r1, #0x77\r
- bne reg1_error_loopf\r
- vmov r0, r1, d20\r
- cmp r0, #0x88\r
- bne reg1_error_loopf\r
- cmp r1, #0x99\r
- bne reg1_error_loopf\r
- vmov r0, r1, d21\r
- cmp r0, #0xAA\r
- bne reg1_error_loopf\r
- cmp r1, #0xBB\r
- bne reg1_error_loopf\r
- vmov r0, r1, d22\r
- cmp r0, #0xFF\r
- bne reg1_error_loopf\r
- cmp r1, #0x11\r
- bne reg1_error_loopf\r
- vmov r0, r1, d23\r
- cmp r0, #0x22\r
- bne reg1_error_loopf\r
- cmp r1, #0x33\r
- bne reg1_error_loopf\r
- vmov r0, r1, d24\r
- cmp r0, #0x44\r
- bne reg1_error_loopf\r
- cmp r1, #0x55\r
- bne reg1_error_loopf\r
- vmov r0, r1, d25\r
- cmp r0, #0x66\r
- bne reg1_error_loopf\r
- cmp r1, #0x77\r
- bne reg1_error_loopf\r
- vmov r0, r1, d26\r
- cmp r0, #0x88\r
- bne reg1_error_loopf\r
- cmp r1, #0x99\r
- bne reg1_error_loopf\r
- vmov r0, r1, d27\r
- cmp r0, #0xAA\r
- bne reg1_error_loopf\r
- cmp r1, #0xBB\r
- bne reg1_error_loopf\r
- vmov r0, r1, d28\r
- cmp r0, #0xFF\r
- bne reg1_error_loopf\r
- cmp r1, #0x11\r
- bne reg1_error_loopf\r
- vmov r0, r1, d29\r
- cmp r0, #0x22\r
- bne reg1_error_loopf\r
- cmp r1, #0x33\r
- bne reg1_error_loopf\r
- vmov r0, r1, d30\r
- cmp r0, #0x44\r
- bne reg1_error_loopf\r
- cmp r1, #0x55\r
- bne reg1_error_loopf\r
- vmov r0, r1, d31\r
- cmp r0, #0x66\r
- bne reg1_error_loopf\r
- cmp r1, #0x77\r
- bne reg1_error_loopf\r
-\r
- /* Restore the registers that were clobbered by the test. */\r
- pop {r0-r1}\r
-\r
- /* VFP register test passed. Jump to the core register test. */\r
- b reg1_loopf_pass\r
-\r
-reg1_error_loopf:\r
- /* If this line is hit then a VFP register value was found to be\r
- incorrect. */\r
- b reg1_error_loopf\r
-\r
-reg1_loopf_pass:\r
-\r
- /* Test each general purpose register to check that it still contains the\r
- expected known value, jumping to reg1_error_loop if any register contains\r
- an unexpected value. */\r
- cmp r0, #0xFF\r
- bne reg1_error_loop\r
- cmp r1, #0x11\r
- bne reg1_error_loop\r
- cmp r2, #0x22\r
- bne reg1_error_loop\r
- cmp r3, #0x33\r
- bne reg1_error_loop\r
- cmp r4, #0x44\r
- bne reg1_error_loop\r
- cmp r5, #0x55\r
- bne reg1_error_loop\r
- cmp r6, #0x66\r
- bne reg1_error_loop\r
- cmp r7, #0x77\r
- bne reg1_error_loop\r
- cmp r8, #0x88\r
- bne reg1_error_loop\r
- cmp r9, #0x99\r
- bne reg1_error_loop\r
- cmp r10, #0xAA\r
- bne reg1_error_loop\r
- cmp r11, #0xBB\r
- bne reg1_error_loop\r
- cmp r12, #0xCC\r
- bne reg1_error_loop\r
- cmp r14, #0xEE\r
- bne reg1_error_loop\r
-\r
- /* Everything passed, increment the loop counter. */\r
- push { r0-r1 }\r
- ldr r0, =ulRegTest1LoopCounter\r
- ldr r1, [r0]\r
- adds r1, r1, #1\r
- str r1, [r0]\r
- pop { r0-r1 }\r
-\r
- /* Start again. */\r
- b reg1_loop\r
-\r
-reg1_error_loop:\r
- /* If this line is hit then there was an error in a core register value.\r
- The loop ensures the loop counter stops incrementing. */\r
- b reg1_error_loop\r
- nop\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-vRegTest2Implementation:\r
-\r
- /* Put a known value in each register. */\r
- mov r0, #0xFF000000\r
- mov r1, #0x11000000\r
- mov r2, #0x22000000\r
- mov r3, #0x33000000\r
- mov r4, #0x44000000\r
- mov r5, #0x55000000\r
- mov r6, #0x66000000\r
- mov r7, #0x77000000\r
- mov r8, #0x88000000\r
- mov r9, #0x99000000\r
- mov r10, #0xAA000000\r
- mov r11, #0xBB000000\r
- mov r12, #0xCC000000\r
- mov r14, #0xEE000000\r
-\r
- /* Likewise the floating point registers */\r
- vmov d0, r0, r1\r
- vmov d1, r2, r3\r
- vmov d2, r4, r5\r
- vmov d3, r6, r7\r
- vmov d4, r8, r9\r
- vmov d5, r10, r11\r
- vmov d6, r0, r1\r
- vmov d7, r2, r3\r
- vmov d8, r4, r5\r
- vmov d9, r6, r7\r
- vmov d10, r8, r9\r
- vmov d11, r10, r11\r
- vmov d12, r0, r1\r
- vmov d13, r2, r3\r
- vmov d14, r4, r5\r
- vmov d15, r6, r7\r
-\r
- vmov d16, r0, r1\r
- vmov d17, r2, r3\r
- vmov d18, r4, r5\r
- vmov d19, r6, r7\r
- vmov d20, r8, r9\r
- vmov d21, r10, r11\r
- vmov d22, r0, r1\r
- vmov d23, r2, r3\r
- vmov d24, r4, r5\r
- vmov d25, r6, r7\r
- vmov d26, r8, r9\r
- vmov d27, r10, r11\r
- vmov d28, r0, r1\r
- vmov d29, r2, r3\r
- vmov d30, r4, r5\r
- vmov d31, r6, r7\r
-\r
- /* Loop, checking each itteration that each register still contains the\r
- expected value. */\r
-reg2_loop:\r
- /* Check all the VFP registers still contain the values set above.\r
- First save registers that are clobbered by the test. */\r
- push { r0-r1 }\r
-\r
- vmov r0, r1, d0\r
- cmp r0, #0xFF000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x11000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d1\r
- cmp r0, #0x22000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x33000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d2\r
- cmp r0, #0x44000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x55000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d3\r
- cmp r0, #0x66000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x77000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d4\r
- cmp r0, #0x88000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x99000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d5\r
- cmp r0, #0xAA000000\r
- bne reg2_error_loopf\r
- cmp r1, #0xBB000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d6\r
- cmp r0, #0xFF000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x11000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d7\r
- cmp r0, #0x22000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x33000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d8\r
- cmp r0, #0x44000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x55000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d9\r
- cmp r0, #0x66000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x77000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d10\r
- cmp r0, #0x88000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x99000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d11\r
- cmp r0, #0xAA000000\r
- bne reg2_error_loopf\r
- cmp r1, #0xBB000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d12\r
- cmp r0, #0xFF000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x11000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d13\r
- cmp r0, #0x22000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x33000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d14\r
- cmp r0, #0x44000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x55000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d15\r
- cmp r0, #0x66000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x77000000\r
- bne reg2_error_loopf\r
-\r
- vmov r0, r1, d16\r
- cmp r0, #0xFF000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x11000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d17\r
- cmp r0, #0x22000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x33000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d18\r
- cmp r0, #0x44000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x55000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d19\r
- cmp r0, #0x66000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x77000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d20\r
- cmp r0, #0x88000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x99000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d21\r
- cmp r0, #0xAA000000\r
- bne reg2_error_loopf\r
- cmp r1, #0xBB000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d22\r
- cmp r0, #0xFF000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x11000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d23\r
- cmp r0, #0x22000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x33000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d24\r
- cmp r0, #0x44000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x55000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d25\r
- cmp r0, #0x66000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x77000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d26\r
- cmp r0, #0x88000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x99000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d27\r
- cmp r0, #0xAA000000\r
- bne reg2_error_loopf\r
- cmp r1, #0xBB000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d28\r
- cmp r0, #0xFF000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x11000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d29\r
- cmp r0, #0x22000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x33000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d30\r
- cmp r0, #0x44000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x55000000\r
- bne reg2_error_loopf\r
- vmov r0, r1, d31\r
- cmp r0, #0x66000000\r
- bne reg2_error_loopf\r
- cmp r1, #0x77000000\r
- bne reg2_error_loopf\r
-\r
- /* Restore the registers that were clobbered by the test. */\r
- pop {r0-r1}\r
-\r
- /* VFP register test passed. Jump to the core register test. */\r
- b reg2_loopf_pass\r
-\r
-reg2_error_loopf:\r
- /* If this line is hit then a VFP register value was found to be\r
- incorrect. */\r
- b reg2_error_loopf\r
-\r
-reg2_loopf_pass:\r
-\r
- cmp r0, #0xFF000000\r
- bne reg2_error_loop\r
- cmp r1, #0x11000000\r
- bne reg2_error_loop\r
- cmp r2, #0x22000000\r
- bne reg2_error_loop\r
- cmp r3, #0x33000000\r
- bne reg2_error_loop\r
- cmp r4, #0x44000000\r
- bne reg2_error_loop\r
- cmp r5, #0x55000000\r
- bne reg2_error_loop\r
- cmp r6, #0x66000000\r
- bne reg2_error_loop\r
- cmp r7, #0x77000000\r
- bne reg2_error_loop\r
- cmp r8, #0x88000000\r
- bne reg2_error_loop\r
- cmp r9, #0x99000000\r
- bne reg2_error_loop\r
- cmp r10, #0xAA000000\r
- bne reg2_error_loop\r
- cmp r11, #0xBB000000\r
- bne reg2_error_loop\r
- cmp r12, #0xCC000000\r
- bne reg2_error_loop\r
- cmp r14, #0xEE000000\r
- bne reg2_error_loop\r
-\r
- /* Everything passed, increment the loop counter. */\r
- push { r0-r1 }\r
- ldr r0, =ulRegTest2LoopCounter\r
- ldr r1, [r0]\r
- adds r1, r1, #1\r
- str r1, [r0]\r
- pop { r0-r1 }\r
-\r
- /* Start again. */\r
- b reg2_loop\r
-\r
-reg2_error_loop:\r
- /* If this line is hit then there was an error in a core register value.\r
- The loop ensures the loop counter stops incrementing. */\r
- b reg2_error_loop\r
- nop\r
-\r
-\r
- .end\r
-\r
+++ /dev/null
-/*\r
- FreeRTOS V8.0.0:rc2 - Copyright (C) 2014 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that has become a de facto standard. *\r
- * *\r
- * Help yourself get started quickly and support the FreeRTOS *\r
- * project by purchasing a FreeRTOS tutorial book, reference *\r
- * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
- * *\r
- * Thank you! *\r
- * *\r
- ***************************************************************************\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
-\r
- >>! NOTE: The modification to the GPL is included to allow you to distribute\r
- >>! a combined work that includes FreeRTOS without being obliged to provide\r
- >>! the source code for proprietary components outside of the FreeRTOS\r
- >>! kernel.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- 1 tab == 4 spaces!\r
-\r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
- license and Real Time Engineers Ltd. contact details.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
- */\r
-\r
-/*\r
- BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.\r
-\r
- Note1: This driver is used specifically to provide an interface to the\r
- FreeRTOS+CLI command interpreter. It is *not* intended to be a generic\r
- serial port driver. Nor is it intended to be used as an example of an\r
- efficient implementation. In particular, a queue is used to buffer\r
- received characters, which is fine in this case as key presses arrive\r
- slowly, but a DMA and/or RAM buffer should be used in place of the queue in\r
- applications that expect higher throughput.\r
-\r
- Note2: This driver does not attempt to handle UART errors.\r
-*/\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-#include "queue.h"\r
-#include "semphr.h"\r
-\r
-/* Demo application includes. */\r
-#include "serial.h"\r
-\r
-/* Xilinx includes. */\r
-#include "xuartps.h"\r
-#include "xscugic.h"\r
-#include "xil_exception.h"\r
-\r
-/* The UART interrupts of interest when receiving. */\r
-#define serRECEIVE_INTERRUPT_MASK ( XUARTPS_IXR_RXOVR | XUARTPS_IXR_RXFULL | XUARTPS_IXR_TOUT )\r
-\r
-/* The UART interrupts of interest when transmitting. */\r
-#define serTRANSMIT_IINTERRUPT_MASK ( XUARTPS_IXR_TXEMPTY )\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* The UART being used. */\r
-static XUartPs xUARTInstance;\r
-\r
-/* The interrupt controller, which is configred by the hardware setup routines\r
-defined in main(). */\r
-extern XScuGic xInterruptController;\r
-\r
-/* The queue into which received key presses are placed. NOTE THE COMMENTS AT\r
-THE TOP OF THIS FILE REGARDING THE USE OF QUEUES FOR THIS PURPOSE. */\r
-static QueueHandle_t xRxQueue = NULL;\r
-\r
-/* The semaphore used to indicate the end of a transmission. */\r
-static SemaphoreHandle_t xTxCompleteSemaphore = NULL;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * The UART interrupt handler is defined in this file to provide more control,\r
- * but still uses parts of the Xilinx provided driver.\r
- */\r
-void prvUART_Handler( void *pvNotUsed );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * See the serial2.h header file.\r
- */\r
-xComPortHandle xSerialPortInitMinimal( uint32_t ulWantedBaud, UBaseType_t uxQueueLength )\r
-{\r
-BaseType_t xStatus;\r
-XUartPs_Config *pxConfig;\r
-\r
- /* Create the queue used to hold received characters. NOTE THE COMMENTS AT\r
- THE TOP OF THIS FILE REGARDING THE QUEUE OF QUEUES FOR THIS PURPSOE. */\r
- xRxQueue = xQueueCreate( uxQueueLength, sizeof( char ) );\r
- configASSERT( xRxQueue );\r
-\r
- /* Create the semaphore used to signal the end of a transmission, then take\r
- the semaphore so it is in the correct state the first time\r
- xSerialSendString() is called. A block time of zero is used when taking\r
- the semaphore as it is guaranteed to be available (it was just created). */\r
- xTxCompleteSemaphore = xSemaphoreCreateMutex();\r
- configASSERT( xTxCompleteSemaphore );\r
- xSemaphoreTake( xTxCompleteSemaphore, 0 );\r
-\r
- /* Look up the UART configuration then initialise the dirver. */\r
- pxConfig = XUartPs_LookupConfig( XPAR_XUARTPS_0_DEVICE_ID );\r
-\r
- /* Initialise the driver. */\r
- xStatus = XUartPs_CfgInitialize( &xUARTInstance, pxConfig, XPAR_PS7_UART_1_BASEADDR );\r
- configASSERT( xStatus == XST_SUCCESS );\r
-\r
- /* Misc. parameter configuration. */\r
- XUartPs_SetBaudRate( &xUARTInstance, ulWantedBaud );\r
- XUartPs_SetOperMode( &xUARTInstance, XUARTPS_OPER_MODE_NORMAL );\r
-\r
- /* Install the interrupt service routine that is defined within this\r
- file. */\r
- xStatus = XScuGic_Connect( &xInterruptController, XPAR_XUARTPS_1_INTR, (Xil_ExceptionHandler) prvUART_Handler, (void *) &xUARTInstance );\r
- configASSERT( xStatus == XST_SUCCESS );\r
-\r
- /* Ensure interrupts start clear. */\r
- XUartPs_WriteReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_ISR_OFFSET, XUARTPS_IXR_MASK );\r
-\r
- /* Enable the UART interrupt within the GIC. */\r
- XScuGic_Enable( &xInterruptController, XPAR_XUARTPS_1_INTR );\r
-\r
- /* Enable the interrupts of interest in the UART. */\r
- XUartPs_SetInterruptMask( &xUARTInstance, XUARTPS_IXR_RXFULL | XUARTPS_IXR_RXOVR | XUARTPS_IXR_TOUT | XUARTPS_IXR_TXEMPTY );\r
-\r
- /* Set the receive timeout. */\r
- XUartPs_SetRecvTimeout( &xUARTInstance, 8 );\r
-\r
- return ( xComPortHandle ) 0;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-BaseType_t xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )\r
-{\r
-BaseType_t xReturn;\r
-\r
- /* Only a single port is supported. */\r
- ( void ) pxPort;\r
-\r
- /* Obtain a received character from the queue - entering the Blocked state\r
- (so not consuming any processing time) to wait for a character if one is not\r
- already available. */\r
- xReturn = xQueueReceive( xRxQueue, pcRxedChar, xBlockTime );\r
- return xReturn;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )\r
-{\r
-const TickType_t xMaxWait = 200UL / portTICK_PERIOD_MS;\r
-\r
- /* Only a single port is supported. */\r
- ( void ) pxPort;\r
-\r
- /* Start the transmission. The interrupt service routine will complete the\r
- transmission if necessary. */\r
- XUartPs_Send( &xUARTInstance, ( void * ) pcString, usStringLength );\r
-\r
- /* Wait until the string has been transmitted before exiting this function,\r
- otherwise there is a risk the calling function will overwrite the string\r
- pointed to by the pcString parameter while it is still being transmitted.\r
- The calling task will wait in the Blocked state (so not consuming any\r
- processing time) until the mutex is available. */\r
- xSemaphoreTake( xTxCompleteSemaphore, xMaxWait );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )\r
-{\r
- /* Only a single port is supported. */\r
- ( void ) pxPort;\r
-\r
- /* Send the character. */\r
- XUartPs_Send( &xUARTInstance, ( void * ) &cOutChar, sizeof( cOutChar ) );\r
-\r
- /* Wait for the transmission to be complete so the mutex is left in the\r
- correct state for the next time vSerialPutString() is called. */\r
- xSemaphoreTake( xTxCompleteSemaphore, xBlockTime );\r
-\r
- return pdPASS;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vSerialClose(xComPortHandle xPort)\r
-{\r
- /* Not supported as not required by the demo application. */\r
- ( void ) xPort;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void prvUART_Handler( void *pvNotUsed )\r
-{\r
-extern unsigned int XUartPs_SendBuffer( XUartPs *InstancePtr );\r
-uint32_t ulActiveInterrupts, ulChannelStatusRegister;\r
-BaseType_t xHigherPriorityTaskWoken = pdFALSE;\r
-char cChar;\r
-\r
- configASSERT( pvNotUsed == &xUARTInstance );\r
-\r
- /* Read the interrupt ID register to see which interrupt is active. */\r
- ulActiveInterrupts = XUartPs_ReadReg(XPAR_PS7_UART_1_BASEADDR, XUARTPS_IMR_OFFSET);\r
- ulActiveInterrupts &= XUartPs_ReadReg(XPAR_PS7_UART_1_BASEADDR, XUARTPS_ISR_OFFSET);\r
-\r
- /* Are any receive events of interest active? */\r
- if( ( ulActiveInterrupts & serRECEIVE_INTERRUPT_MASK ) != 0 )\r
- {\r
- /* Read the Channel Status Register to determine if there is any data in\r
- the RX FIFO. */\r
- ulChannelStatusRegister = XUartPs_ReadReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_SR_OFFSET );\r
-\r
- /* Move data from the Rx FIFO to the Rx queue. NOTE THE COMMENTS AT THE\r
- TOP OF THIS FILE ABOUT USING QUEUES FOR THIS PURPSOE. */\r
- while( ( ulChannelStatusRegister & XUARTPS_SR_RXEMPTY ) == 0 )\r
- {\r
- cChar = XUartPs_ReadReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_FIFO_OFFSET );\r
-\r
- /* If writing to the queue unblocks a task, and the unblocked task\r
- has a priority above the currently running task (the task that this\r
- interrupt interrupted), then xHigherPriorityTaskWoken will be set\r
- to pdTRUE inside the xQueueSendFromISR() function.\r
- xHigherPriorityTaskWoken is then passed to portYIELD_FROM_ISR() at\r
- the end of this interrupt handler to request a context switch so the\r
- interrupt returns directly to the (higher priority) unblocked\r
- task. */\r
- xQueueSendFromISR( xRxQueue, &cChar, &xHigherPriorityTaskWoken );\r
- ulChannelStatusRegister = XUartPs_ReadReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_SR_OFFSET );\r
- }\r
- }\r
-\r
- /* Are any transmit events of interest active? */\r
- if( ( ulActiveInterrupts & serTRANSMIT_IINTERRUPT_MASK ) != 0 )\r
- {\r
- if( xUARTInstance.SendBuffer.RemainingBytes == 0 )\r
- {\r
- /* Give back the semaphore to indicate that the tranmission is\r
- complete. If giving the semaphore unblocks a task, and the\r
- unblocked task has a priority above the currently running task (the\r
- task that this interrupt interrupted), then xHigherPriorityTaskWoken\r
- will be set to pdTRUE inside the xSemaphoreGiveFromISR() function.\r
- xHigherPriorityTaskWoken is then passed to portYIELD_FROM_ISR() at\r
- the end of this interrupt handler to request a context switch so the\r
- interrupt returns directly to the (higher priority) unblocked\r
- task. */\r
- xSemaphoreGiveFromISR( xTxCompleteSemaphore, &xHigherPriorityTaskWoken );\r
-\r
- /* No more data to transmit. */\r
- XUartPs_WriteReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_IDR_OFFSET, XUARTPS_IXR_TXEMPTY );\r
- }\r
- else\r
- {\r
- /* More data to send. */\r
- XUartPs_SendBuffer( &xUARTInstance );\r
- }\r
- }\r
-\r
- /* portYIELD_FROM_ISR() will request a context switch if executing this\r
- interrupt handler caused a task to leave the blocked state, and the task\r
- that left the blocked state has a higher priority than the currently running\r
- task (the task this interrupt interrupted). See the comment above the calls\r
- to xSemaphoreGiveFromISR() and xQueueSendFromISR() within this function. */\r
- portYIELD_FROM_ISR( xHigherPriorityTaskWoken );\r
-\r
- /* Clear the interrupt status. */\r
- XUartPs_WriteReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_ISR_OFFSET, ulActiveInterrupts );\r
-}\r
-\r
-\r
-\r
-\r
-\r
projects / freertos / commitdiff