]> git.sur5r.net Git - u-boot/commitdiff
mx6slevk: Add SPI NOR flash support
authorFabio Estevam <fabio.estevam@freescale.com>
Fri, 11 Apr 2014 11:39:43 +0000 (08:39 -0300)
committerStefano Babic <sbabic@denx.de>
Mon, 28 Apr 2014 12:00:16 +0000 (14:00 +0200)
mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
arch/arm/include/asm/arch-mx6/mx6sl_pins.h
board/freescale/mx6slevk/mx6slevk.c
include/configs/mx6slevk.h

index 5f9c90ad874a6568049ecdd27a4ea1f4324faa67..045ccc4512f3710ad4947f52ac3c904b61ab94eb 100644 (file)
 #include <asm/imx-common/iomux-v3.h>
 
 enum {
+       MX6_PAD_ECSPI1_MISO__ECSPI_MISO                         = IOMUX_PAD(0x0358, 0x0068, 0, 0x0684, 0, 0),
+       MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI                         = IOMUX_PAD(0x035C, 0x006C, 0, 0x0688, 0, 0),
+       MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK                         = IOMUX_PAD(0x0360, 0x0070, 0, 0x067C, 0, 0),
+       MX6_PAD_ECSPI1_SS0__GPIO4_IO11                          = IOMUX_PAD(0x0364, 0x0074, 5, 0x0000, 0, 0),
        MX6_PAD_SD2_CLK__USDHC2_CLK                             = IOMUX_PAD(0x055C, 0x0254, 0, 0x0000, 0, 0),
        MX6_PAD_SD2_CMD__USDHC2_CMD                             = IOMUX_PAD(0x0560, 0x0258, 0, 0x0000, 0, 0),
        MX6_PAD_SD2_DAT0__USDHC2_DAT0                           = IOMUX_PAD(0x0564, 0x025C, 0, 0x0000, 0, 0),
index aadad3266f3c90fbcd6957201c35a06be732ecb1..d2b64cc35748ec3cd518fede6f7c0dad8f5aaea5 100644 (file)
@@ -34,6 +34,9 @@ DECLARE_GLOBAL_DATA_PTR;
        PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED   |             \
        PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
 
+#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
+                     PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+
 #define ETH_PHY_RESET  IMX_GPIO_NR(4, 21)
 
 int dram_init(void)
@@ -71,6 +74,20 @@ static iomux_v3_cfg_t const fec_pads[] = {
        MX6_PAD_FEC_TX_CLK__GPIO_4_21 | MUX_PAD_CTRL(NO_PAD_CTRL),
 };
 
+#ifdef CONFIG_MXC_SPI
+static iomux_v3_cfg_t ecspi1_pads[] = {
+       MX6_PAD_ECSPI1_MISO__ECSPI_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
+       MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
+       MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
+       MX6_PAD_ECSPI1_SS0__GPIO4_IO11  | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
+static void setup_spi(void)
+{
+       imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
+}
+#endif
+
 static void setup_iomux_uart(void)
 {
        imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
@@ -132,6 +149,9 @@ static int setup_fec(void)
 int board_early_init_f(void)
 {
        setup_iomux_uart();
+#ifdef CONFIG_MXC_SPI
+       setup_spi();
+#endif
        return 0;
 }
 
index 1876dbf35addc2ab43daa78530107456342e35ea..3d05a647d94df151c7e203a69d5a52b5c56861d1 100644 (file)
@@ -10,6 +10,7 @@
 #define __CONFIG_H
 
 #include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
 #include <linux/sizes.h>
 #include "mx6_common.h"
 
 #define CONFIG_CMD_CACHE
 #endif
 
+#define CONFIG_CMD_SF
+#ifdef CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_MXC_SPI
+#define CONFIG_SF_DEFAULT_BUS          0
+#define CONFIG_SF_DEFAULT_CS           (0 | (IMX_GPIO_NR(4, 11) << 8))
+#define CONFIG_SF_DEFAULT_SPEED                20000000
+#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
+#endif
+
 #endif                         /* __CONFIG_H */