83xx: Remove warmboot parameter from PCI init functions

This change lays the groundwork for the BOOTFLAG_* flags being removed.

This change has the small affect of delaying 100ms on PCI initialization
after a warm boot as opposed to the optimal 1ms on some boards.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
included the mpc8308_p1m board.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

diff --git a/arch/powerpc/cpu/mpc83xx/pci.c b/arch/powerpc/cpu/mpc83xx/pci.c
index a42b230ff35e62db43727e437a6f97bd7f30771c..288d99ffcfa598ae31d8d90f0240ffe365efd98f 100644 (file)
--- a/arch/powerpc/cpu/mpc83xx/pci.c
+++ b/arch/powerpc/cpu/mpc83xx/pci.c
@@ -133,7 +133,7 @@ static void pci_init_bus(int bus, struct pci_region *reg)
  * If fewer than three regions are requested, then the region
  * list is terminated with a region of size 0.
  */
-void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot)
+void mpc83xx_pci_init(int num_buses, struct pci_region **reg)
 {
        volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
        int i;
@@ -150,9 +150,9 @@ void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot)
        /*
         * Release PCI RST Output signal.
         * Power on to RST high must be at least 100 ms as per PCI spec.
-        * On warm boots only 1 ms is required.
+        * On warm boots only 1 ms is required, but we play it safe.
         */
-       udelay(warmboot ? 1000 : 100000);
+       udelay(100000);
 
        for (i = 0; i < num_buses; i++)
                immr->pci_ctrl[i].gcr = 1;

diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
index 09912bea3c58ce3ac36f7c47e17a8845d060362c..1771c4823ccbe83deca75578e00ad235cad59aef 100644 (file)
--- a/arch/powerpc/cpu/mpc83xx/pcie.c
+++ b/arch/powerpc/cpu/mpc83xx/pcie.c
@@ -308,16 +308,16 @@ static void mpc83xx_pcie_init_bus(int bus, struct pci_region *reg)
  * The caller must have already set SCCR, SERDES and the PCIE_LAW BARs
  * must have been set to cover all of the requested regions.
  */
-void mpc83xx_pcie_init(int num_buses, struct pci_region **reg, int warmboot)
+void mpc83xx_pcie_init(int num_buses, struct pci_region **reg)
 {
        int i;
 
        /*
         * Release PCI RST Output signal.
         * Power on to RST high must be at least 100 ms as per PCI spec.
-        * On warm boots only 1 ms is required.
+        * On warm boots only 1 ms is required, but we play it safe.
         */
-       udelay(warmboot ? 1000 : 100000);
+       udelay(100000);
 
        if (num_buses > ARRAY_SIZE(mpc83xx_pcie_cfg_space)) {
                printf("Second PCIE host contoller not configured!\n");

diff --git a/board/esd/vme8349/pci.c b/board/esd/vme8349/pci.c
index 94fd32a6fa5f7434b6f748463d6690e1d8c4759b..2802be12d1a919d84f0290218062b7c2f1fb0146 100644 (file)
--- a/board/esd/vme8349/pci.c
+++ b/board/esd/vme8349/pci.c
@@ -124,7 +124,7 @@ pci_init_board(void)
        udelay(2000);
 
        if (monarch == 0) {
-               mpc83xx_pci_init(1, reg, 0);
+               mpc83xx_pci_init(1, reg);
        } else {
                /*
                 * Release PCI RST Output signal

diff --git a/board/freescale/mpc8308rdb/mpc8308rdb.c b/board/freescale/mpc8308rdb/mpc8308rdb.c
index fb29abfa34a6d457dad30f1693f4193c21ecc4f6..5c543573a81f046f88c1c1d2f5c9715151fad2ab 100644 (file)
--- a/board/freescale/mpc8308rdb/mpc8308rdb.c
+++ b/board/freescale/mpc8308rdb/mpc8308rdb.c
@@ -100,7 +100,7 @@ void pci_init_board(void)
        out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR);
        out_be32(&pcie_law[0].ar, LBLAWAR_EN | LBLAWAR_512MB);
 
-       mpc83xx_pcie_init(1, pcie_reg, 0);
+       mpc83xx_pcie_init(1, pcie_reg);
 }
 /*
  * Miscellaneous late-boot configurations

diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c
index e5f62ae9650905835fc76e34c98ac90163353074..08f873d7e453d058b689d2ede93271130cc228f0 100644 (file)
--- a/board/freescale/mpc8313erdb/mpc8313erdb.c
+++ b/board/freescale/mpc8313erdb/mpc8313erdb.c
@@ -80,7 +80,6 @@ void pci_init_board(void)
        volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
        volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
        struct pci_region *reg[] = { pci_regions };
-       int warmboot;
 
        /* Enable all 3 PCI_CLK_OUTPUTs. */
        clk->occr |= 0xe0000000;
@@ -94,12 +93,7 @@ void pci_init_board(void)
        pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
 
-       warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
-#ifndef CONFIG_SYS_8313ERDB_BROKEN_PMC
-       warmboot |= immr->pmc.pmccr1 & PMCCR1_POWER_OFF;
-#endif
-
-       mpc83xx_pci_init(1, reg, warmboot);
+       mpc83xx_pci_init(1, reg);
 }
 
 /*

diff --git a/board/freescale/mpc8315erdb/mpc8315erdb.c b/board/freescale/mpc8315erdb/mpc8315erdb.c
index d5e71dc522ff4acb8b931697f360e5a36ca1bb59..5dc558a4f8fafeadeacae6603dc16285536710d2 100644 (file)
--- a/board/freescale/mpc8315erdb/mpc8315erdb.c
+++ b/board/freescale/mpc8315erdb/mpc8315erdb.c
@@ -140,7 +140,6 @@ void pci_init_board(void)
        volatile law83xx_t *pcie_law = sysconf->pcielaw;
        struct pci_region *reg[] = { pci_regions };
        struct pci_region *pcie_reg[] = { pcie_regions_0, pcie_regions_1, };
-       int warmboot;
 
        /* Enable all 3 PCI_CLK_OUTPUTs. */
        clk->occr |= 0xe0000000;
@@ -154,10 +153,7 @@ void pci_init_board(void)
        pci_law[1].bar = CONFIG_SYS_PCI_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
 
-       warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
-       warmboot |= immr->pmc.pmccr1 & PMCCR1_POWER_OFF;
-
-       mpc83xx_pci_init(1, reg, warmboot);
+       mpc83xx_pci_init(1, reg);
 
        /* Configure the clock for PCIE controller */
        clrsetbits_be32(&clk->sccr, SCCR_PCIEXP1CM | SCCR_PCIEXP2CM,
@@ -175,7 +171,7 @@ void pci_init_board(void)
        out_be32(&pcie_law[1].bar, CONFIG_SYS_PCIE2_BASE & LAWBAR_BAR);
        out_be32(&pcie_law[1].ar, LBLAWAR_EN | LBLAWAR_512MB);
 
-       mpc83xx_pcie_init(2, pcie_reg, warmboot);
+       mpc83xx_pcie_init(2, pcie_reg);
 }
 
 #if defined(CONFIG_OF_BOARD_SETUP)

diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c
index 8680a19a6f5d10b3e74fe361613dadbcfd719a51..7a0ff184fc7e4e05ebb5d8126e4128a17d70f82d 100644 (file)
--- a/board/freescale/mpc8323erdb/mpc8323erdb.c
+++ b/board/freescale/mpc8323erdb/mpc8323erdb.c
@@ -173,7 +173,7 @@ void pci_init_board(void)
        pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
 
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 }
 
 #if defined(CONFIG_OF_BOARD_SETUP)

diff --git a/board/freescale/mpc832xemds/pci.c b/board/freescale/mpc832xemds/pci.c
index e1dd75784c36391ffd49f551b1295b054c28de37..5c7901d39b5ce58916a050d9ea2684b81fdb3b33 100644 (file)
--- a/board/freescale/mpc832xemds/pci.c
+++ b/board/freescale/mpc832xemds/pci.c
@@ -86,7 +86,7 @@ void pci_init_board(void)
        pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
 
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 
        /*
         * Configure PCI Inbound Translation Windows
@@ -147,9 +147,9 @@ void pci_init_board(void)
        udelay(2000);
 
 #ifndef CONFIG_MPC83XX_PCI2
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 #else
-       mpc83xx_pci_init(2, reg, 0);
+       mpc83xx_pci_init(2, reg);
 #endif
 }
 #endif                         /* CONFIG_PCISLAVE */

diff --git a/board/freescale/mpc8349emds/pci.c b/board/freescale/mpc8349emds/pci.c
index 9293f70d6146d8588215ad89004b5cd4d1148c73..832477f28100c627dbfec471afb718a1916e0615 100644 (file)
--- a/board/freescale/mpc8349emds/pci.c
+++ b/board/freescale/mpc8349emds/pci.c
@@ -161,9 +161,9 @@ void pci_init_board(void)
        udelay(2000);
 
 #ifndef CONFIG_MPC83XX_PCI2
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 #else
-       mpc83xx_pci_init(2, reg, 0);
+       mpc83xx_pci_init(2, reg);
 #endif
 }
 
@@ -182,7 +182,7 @@ void pci_init_board(void)
        pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
 
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 
        /* Configure PCI Inbound Translation Windows (3 1MB windows) */
        pci_ctrl->pitar0 = 0x0;

diff --git a/board/freescale/mpc8349itx/pci.c b/board/freescale/mpc8349itx/pci.c
index 38baff30b140f279791ee3436d773dffa239365b..7d30d9b85f003b98da5ab16ca342977d4d32baf3 100644 (file)
--- a/board/freescale/mpc8349itx/pci.c
+++ b/board/freescale/mpc8349itx/pci.c
@@ -114,8 +114,8 @@ void pci_init_board(void)
        udelay(2000);
 
 #ifndef CONFIG_MPC83XX_PCI2
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 #else
-       mpc83xx_pci_init(2, reg, 0);
+       mpc83xx_pci_init(2, reg);
 #endif
 }

diff --git a/board/freescale/mpc8360emds/pci.c b/board/freescale/mpc8360emds/pci.c
index 04a802bc82cc4770072da0ef0f753b2334a214ab..c3a866351200102eeb11cf13cac91dd5c68f340e 100644 (file)
--- a/board/freescale/mpc8360emds/pci.c
+++ b/board/freescale/mpc8360emds/pci.c
@@ -84,7 +84,7 @@ void pci_init_board(void)
        pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_1M;
 
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 
        /*
         * Configure PCI Inbound Translation Windows
@@ -145,9 +145,9 @@ void pci_init_board(void)
        udelay(2000);
 
 #ifndef CONFIG_MPC83XX_PCI2
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 #else
-       mpc83xx_pci_init(2, reg, 0);
+       mpc83xx_pci_init(2, reg);
 #endif
 }
 #endif                         /* CONFIG_PCISLAVE */

diff --git a/board/freescale/mpc8360erdk/mpc8360erdk.c b/board/freescale/mpc8360erdk/mpc8360erdk.c
index 377187816a180d94738860fa73f7a67d9e9f3502..a6530d16c3bdc939ebaca3552c56c95e659ae529 100644 (file)
--- a/board/freescale/mpc8360erdk/mpc8360erdk.c
+++ b/board/freescale/mpc8360erdk/mpc8360erdk.c
@@ -344,7 +344,7 @@ void pci_init_board(void)
        pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
 
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 }
 
 #if defined(CONFIG_OF_BOARD_SETUP)

diff --git a/board/freescale/mpc837xemds/pci.c b/board/freescale/mpc837xemds/pci.c
index 82f34f85c8bf267aa17cfeed92c8ca5cb693b544..77c5bda6ad4ff5b67de076930999bd9fd121ccdf 100644 (file)
--- a/board/freescale/mpc837xemds/pci.c
+++ b/board/freescale/mpc837xemds/pci.c
@@ -108,7 +108,7 @@ void pci_init_board(void)
 
        udelay(2000);
 
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 skip_pci:
        /* There is no PEX in MPC8379 parts. */
        if (PARTID_NO_E(spridr) == SPR_8379)

diff --git a/board/freescale/mpc837xerdb/pci.c b/board/freescale/mpc837xerdb/pci.c
index 97ad227bc6f14246d69f3ac365f26b8ba5b76e07..3512bd4ec47b6f88e9f827b35d2225517224a5f4 100644 (file)
--- a/board/freescale/mpc837xerdb/pci.c
+++ b/board/freescale/mpc837xerdb/pci.c
@@ -88,7 +88,7 @@ void pci_init_board(void)
        pci_law[1].bar = CONFIG_SYS_PCI_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
 
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 
        /* There is no PEX in MPC8379 parts. */
        if (PARTID_NO_E(spridr) == SPR_8379)
@@ -110,5 +110,5 @@ void pci_init_board(void)
        out_be32(&pcie_law[1].bar, CONFIG_SYS_PCIE2_BASE & LAWBAR_BAR);
        out_be32(&pcie_law[1].ar, LBLAWAR_EN | LBLAWAR_512MB);
 
-       mpc83xx_pcie_init(2, pcie_reg, 0);
+       mpc83xx_pcie_init(2, pcie_reg);
 }

diff --git a/board/matrix_vision/mvblm7/pci.c b/board/matrix_vision/mvblm7/pci.c
index 1cc524bb4004fc8717f0ea933f425e573b3170c8..921e80b95a27f6e5b56610d754f3dec39110e0ab 100644 (file)
--- a/board/matrix_vision/mvblm7/pci.c
+++ b/board/matrix_vision/mvblm7/pci.c
@@ -60,7 +60,6 @@ static struct pci_region pci_regions[] = {
 void pci_init_board(void)
 {
        int i;
-       int warmboot;
        volatile immap_t *immr;
        volatile pcictrl83xx_t *pci_ctrl;
        volatile gpio83xx_t *gpio;
@@ -102,7 +101,5 @@ void pci_init_board(void)
        pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
 
-       warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
-
-       mpc83xx_pci_init(1, reg, warmboot);
+       mpc83xx_pci_init(1, reg);
 }

diff --git a/board/mpc8308_p1m/mpc8308_p1m.c b/board/mpc8308_p1m/mpc8308_p1m.c
index 0c70b1556d9eedc1db7840c22ce6db3dd0b8112a..d92833b89a57324a6380e30b633aa0a30e0d5813 100644 (file)
--- a/board/mpc8308_p1m/mpc8308_p1m.c
+++ b/board/mpc8308_p1m/mpc8308_p1m.c
@@ -74,7 +74,7 @@ void pci_init_board(void)
        out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR);
        out_be32(&pcie_law[0].ar, LBLAWAR_EN | LBLAWAR_512MB);
 
-       mpc83xx_pcie_init(1, pcie_reg, 0);
+       mpc83xx_pcie_init(1, pcie_reg);
 }
 
 #if defined(CONFIG_OF_BOARD_SETUP)

diff --git a/board/sbc8349/pci.c b/board/sbc8349/pci.c
index ca53356ca01d686767f5f61a05e14a354b7851bd..e06874c6ee1f5a8e8344847ccf25c4604a47a3f9 100644 (file)
--- a/board/sbc8349/pci.c
+++ b/board/sbc8349/pci.c
@@ -84,5 +84,5 @@ pci_init_board(void)
 
        udelay(2000);
 
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 }

diff --git a/board/sheldon/simpc8313/simpc8313.c b/board/sheldon/simpc8313/simpc8313.c
index c2164c9c8543e2b5f3cfda577c2638ed7208e8ce..9126c42d8ecc6536d7db42e4333a4b6bff354ed0 100644 (file)
--- a/board/sheldon/simpc8313/simpc8313.c
+++ b/board/sheldon/simpc8313/simpc8313.c
@@ -67,7 +67,6 @@ void pci_init_board(void)
        volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
        volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
        struct pci_region *reg[] = { pci_regions };
-       int warmboot;
 
        /* Enable all 3 PCI_CLK_OUTPUTs. */
        clk->occr |= 0xe0000000;
@@ -81,9 +80,7 @@ void pci_init_board(void)
        pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
 
-       warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
-
-       mpc83xx_pci_init(1, reg, warmboot);
+       mpc83xx_pci_init(1, reg);
 }
 
 /*

diff --git a/board/tqc/tqm834x/pci.c b/board/tqc/tqm834x/pci.c
index fcf43796276889c652cea2a3f0de867690bfe9ef..f35ea890d3fbb9b4b7b6f04d2e0b9a28c613410d 100644 (file)
--- a/board/tqc/tqm834x/pci.c
+++ b/board/tqc/tqm834x/pci.c
@@ -112,5 +112,5 @@ pci_init_board(void)
 
        udelay(2000);
 
-       mpc83xx_pci_init(1, reg, 0);
+       mpc83xx_pci_init(1, reg);
 }

diff --git a/board/ve8313/ve8313.c b/board/ve8313/ve8313.c
index 2272ff0c34cb50a59e9602a24b073d45410d29fd..166e459a39051894a553fcf5a0896b1a5126ea18 100644 (file)
--- a/board/ve8313/ve8313.c
+++ b/board/ve8313/ve8313.c
@@ -184,7 +184,6 @@ void pci_init_board(void)
        volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
        volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
        struct pci_region *reg[] = { pci_regions };
-       int warmboot;
 
        /* Enable all 3 PCI_CLK_OUTPUTs. */
        setbits_be32(&clk->occr, 0xe0000000);
@@ -198,9 +197,7 @@ void pci_init_board(void)
        out_be32(&pci_law[1].bar, CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR);
        out_be32(&pci_law[1].ar, LBLAWAR_EN | LBLAWAR_1MB);
 
-       warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
-
-       mpc83xx_pci_init(1, reg, warmboot);
+       mpc83xx_pci_init(1, reg);
 }
 #endif
 

diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 0ae83da65b5468f83f35281ef5b9c568a7454914..07e0e0b47d766718d5597e2a096a287d7bd6a52b 100644 (file)
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -1264,9 +1264,9 @@
 
 #ifndef __ASSEMBLY__
 struct pci_region;
-void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot);
+void mpc83xx_pci_init(int num_buses, struct pci_region **reg);
 void mpc83xx_pcislave_unlock(int bus);
-void mpc83xx_pcie_init(int num_buses, struct pci_region **reg, int warmboot);
+void mpc83xx_pcie_init(int num_buses, struct pci_region **reg);
 #endif
 
 #endif /* __MPC83XX_H__ */