]> git.sur5r.net Git - u-boot/commitdiff
mmc/dw_mmc: Fix clock divider calculation error for bypass mode
authorChin Liang See <clsee@altera.com>
Tue, 10 Jun 2014 06:26:52 +0000 (01:26 -0500)
committerPantelis Antoniou <panto@antoniou-consulting.com>
Fri, 1 Aug 2014 16:45:32 +0000 (19:45 +0300)
To fix the clock divider calculation error when the controller
clock same as the operating frequency. This is known as bypass
mode. In this mode, the divider should be 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
drivers/mmc/dw_mmc.c

index 5bf36a0309d870f40be5d7d6806f0d3e0066ffb6..0df30bc04530e162603f3f7ae801518f775ae5ef 100644 (file)
@@ -245,7 +245,10 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
                return -EINVAL;
        }
 
-       div = DIV_ROUND_UP(sclk, 2 * freq);
+       if (sclk == freq)
+               div = 0;        /* bypass mode */
+       else
+               div = DIV_ROUND_UP(sclk, 2 * freq);
 
        dwmci_writel(host, DWMCI_CLKENA, 0);
        dwmci_writel(host, DWMCI_CLKSRC, 0);