arm: vf610: add enet1 support

This patch contains several changes required for second Ethernet
(enet1/RMII1) port on vf610
- ANADIG PLL5 control definitions required for Ethernet RMII1 clock
- Secondary Ethernet (enet1) MAC RMII1 base address definition
- RMII1 iomux definitions
- VF610_PAD_PTA6__RMII0_CLKOUT iomux definition required for
  internal (e.g. crystal-less) Ethernet clocking.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner <stefan@agner.ch>

diff --git a/arch/arm/include/asm/arch-vf610/crm_regs.h b/arch/arm/include/asm/arch-vf610/crm_regs.h
index 04cc5bc47480130bf1aee9588f3367c11dce48e1..e17c7d1f7042f138ac41acb48eb100ebd02953e5 100644 (file)
--- a/arch/arm/include/asm/arch-vf610/crm_regs.h
+++ b/arch/arm/include/asm/arch-vf610/crm_regs.h
@@ -187,6 +187,10 @@ struct anadig_reg {
 #define CCM_CCGR9_FEC0_CTRL_MASK               0x3
 #define CCM_CCGR9_FEC1_CTRL_MASK               (0x3 << 2)
 
+#define ANADIG_PLL5_CTRL_BYPASS                 (1 << 16)
+#define ANADIG_PLL5_CTRL_ENABLE                 (1 << 13)
+#define ANADIG_PLL5_CTRL_POWERDOWN              (1 << 12)
+#define ANADIG_PLL5_CTRL_DIV_SELECT            1
 #define ANADIG_PLL2_CTRL_ENABLE                        (1 << 13)
 #define ANADIG_PLL2_CTRL_POWERDOWN             (1 << 12)
 #define ANADIG_PLL2_CTRL_DIV_SELECT            1

diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h
index b8c877f939b8a0e60b28e7bbc8ae190a51346d3b..c2f976184664872567f7f8f019a7f43ccb1ccc11 100644 (file)
--- a/arch/arm/include/asm/arch-vf610/imx-regs.h
+++ b/arch/arm/include/asm/arch-vf610/imx-regs.h
@@ -85,6 +85,7 @@
 #define ESDHC0_BASE_ADDR       (AIPS1_BASE_ADDR + 0x00031000)
 #define ESDHC1_BASE_ADDR       (AIPS1_BASE_ADDR + 0x00032000)
 #define ENET_BASE_ADDR         (AIPS1_BASE_ADDR + 0x00050000)
+#define ENET1_BASE_ADDR                (AIPS1_BASE_ADDR + 0x00051000)
 
 /* MUX mode and PAD ctrl are in one register */
 #define CONFIG_IOMUX_SHARE_CONF_REG

diff --git a/arch/arm/include/asm/arch-vf610/iomux-vf610.h b/arch/arm/include/asm/arch-vf610/iomux-vf610.h
index f3c201d5859c1778bc20387a489b2138b03d089f..88807d8db47355e35b389c0e6db789818f711e5f 100644 (file)
--- a/arch/arm/include/asm/arch-vf610/iomux-vf610.h
+++ b/arch/arm/include/asm/arch-vf610/iomux-vf610.h
@@ -22,6 +22,7 @@
 
 enum {
        VF610_PAD_PTA6__RMII0_CLKIN             = IOMUX_PAD(0x0000, 0x0000, 2, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTA6__RMII0_CLKOUT            = IOMUX_PAD(0x0000, 0x0000, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
        VF610_PAD_PTB4__UART1_TX                = IOMUX_PAD(0x0068, 0x0068, 2, 0x0380, 0, VF610_UART_PAD_CTRL),
        VF610_PAD_PTB5__UART1_RX                = IOMUX_PAD(0x006c, 0x006c, 2, 0x037c, 0, VF610_UART_PAD_CTRL),
        VF610_PAD_PTB10__UART0_TX               = IOMUX_PAD(0x0080, 0x0080, 1, __NA_, 0, VF610_UART_PAD_CTRL),
@@ -35,6 +36,15 @@ enum {
        VF610_PAD_PTC6__RMII0_TD1               = IOMUX_PAD(0x00cc, 0x00cc, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
        VF610_PAD_PTC7__RMII0_TD0               = IOMUX_PAD(0x00D0, 0x00D0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
        VF610_PAD_PTC8__RMII0_TXEN              = IOMUX_PAD(0x00D4, 0x00D4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC10__RMII1_MDIO             = IOMUX_PAD(0x00dc, 0x00dc, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC9__RMII1_MDC               = IOMUX_PAD(0x00d8, 0x00d8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC11__RMII1_CRS_DV           = IOMUX_PAD(0x00e0, 0x00e0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC12__RMII1_RD1              = IOMUX_PAD(0x00e4, 0x00e4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC13__RMII1_RD0              = IOMUX_PAD(0x00e8, 0x00e8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC14__RMII1_RXER             = IOMUX_PAD(0x00ec, 0x00ec, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC15__RMII1_TD1              = IOMUX_PAD(0x00f0, 0x00f0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC16__RMII1_TD0              = IOMUX_PAD(0x00f4, 0x00f4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC17__RMII1_TXEN             = IOMUX_PAD(0x00f8, 0x00f8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
        VF610_PAD_PTA24__ESDHC1_CLK             = IOMUX_PAD(0x0038, 0x0038, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
        VF610_PAD_PTA25__ESDHC1_CMD             = IOMUX_PAD(0x003c, 0x003c, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
        VF610_PAD_PTA26__ESDHC1_DAT0            = IOMUX_PAD(0x0040, 0x0040, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),