Add sync in do_reset() routine for MPC83xx after RPR register

was written to. It is need on some targets when BAT translation
is enabled.

diff --git a/CHANGELOG b/CHANGELOG
index 304ea23f796b77502677ce81556bc13abf38332f..f4819235a8d1ccccf0531decf8adf584040d5898 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,10 @@
 Changes since U-Boot 1.1.4:
 ======================================================================
 
+* Add sync in do_reset() routine for MPC83xx after RPR register
+  was written to. It is need on some targets when BAT translation
+  is enabled.
+
 * Add bit definitions for MPC83xx DDR controller registers.
 
 * Add Dcbz(), Dcbi() and Dcbf() routines for MPC83xx.

diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c
index e49e4fe0ee4d8e1f608c84b039fc9c916bdf3e9e..63f82422f5b5bb4a9bbf1a8b95fc10d37e0b63b4 100644 (file)
--- a/cpu/mpc83xx/cpu.c
+++ b/cpu/mpc83xx/cpu.c
@@ -93,6 +93,8 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 
        /* enable Reset Control Reg */
        immap->reset.rpr = 0x52535445;
+       __asm__ __volatile__ ("sync");
+       __asm__ __volatile__ ("isync");
 
        /* confirm Reset Control Reg is enabled */
        while(!((immap->reset.rcer) & RCER_CRE));