magnesium \
mv88f6281gtw_ge \
mx1ads \
- netstar \
nhk8815 \
nhk8815_onenand \
omap1510inn \
$(obj)tools/ncb $(obj)tools/ubsha1
@rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image} \
$(obj)board/matrix_vision/*/bootscript.img \
- $(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \
$(obj)board/voiceblue/eeprom \
$(obj)u-boot.lds \
$(obj)arch/blackfin/cpu/bootrom-asm-offsets.[chs] \
+++ /dev/null
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2005
-# Ladislav Michl, 2N Telekomunikace, michl@2n.cz
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := netstar.o
-SOBJS := setup.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-LOAD_ADDR = 0x10400000
-
-#########################################################################
-
-all: $(obj).depend $(LIB) $(obj)eeprom.srec $(obj)eeprom.bin \
- $(obj)crcek.srec $(obj)crcek.bin $(obj)crcit
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $^)
-
-$(obj)eeprom_start.o:
- echo "b eeprom" | $(CC) $(AFLAGS) -c -x assembler -o $@ -
-
-$(obj)eeprom: $(obj)eeprom_start.o $(obj)eeprom.o
- $(LD) -Ttext $(LOAD_ADDR) -e eeprom -o $@ $^ \
- -L$(obj)../../examples/standalone -lstubs \
- $(PLATFORM_LIBS)
-
-$(obj)eeprom.srec: $(obj)eeprom
- $(OBJCOPY) -S -O srec $(<:.o=) $@
-
-$(obj)eeprom.bin: $(obj)eeprom
- $(OBJCOPY) -S -O binary $< $@
-
-$(obj)crcek.srec: $(obj)crcek.o
- $(LD) -g -Ttext 0x00000000 -e crcek -o $(<:.o=) $^
- $(OBJCOPY) -S -O srec $(<:.o=) $@
-
-$(obj)crcek.bin: $(obj)crcek.srec
- $(OBJCOPY) -I srec -O binary $< $@
-
-$(obj)crcit: $(obj)crcit.o $(obj)crc32.o
- $(HOSTCC) $(HOSTCFLAGS) -o $@ $^
-
-$(obj)crcit.o: crcit.c
- $(HOSTCC) $(HOSTCFLAGS) -o $@ -c $<
-
-$(obj)crc32.o: $(SRCTREE)/lib/crc32.c
- $(HOSTCC) $(HOSTCFLAGS) -DUSE_HOSTCC -I$(TOPDIR)/include \
- -o $@ -c $<
-
-clean:
- rm -f $(SOBJS) $(OBJS) \
- $(obj)eeprom_start.o $(obj)eeprom.o \
- $(obj)eeprom $(obj)eeprom.srec $(obj)eeprom.bin \
- $(obj)crcek.o $(obj)crcek $(obj)crcek.srec $(obj)crcek.bin
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-#
-# Linux-Kernel is expected to be at 1000'8000,
-# entry 1000'8000 (mem base + reserved)
-#
-# We load ourself to internal RAM at 2001'2000
-# Check map file when changing CONFIG_SYS_TEXT_BASE.
-# Everything has fit into 192kB internal SRAM!
-#
-
-# XXX CONFIG_SYS_TEXT_BASE = 0x20012000
-CONFIG_SYS_TEXT_BASE = 0x13FC0000
+++ /dev/null
-/**
- * (C) Copyright 2005
- * 2N Telekomunikace, Ladislav Michl <michl@2n.cz>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2.
- *
- * Image layout looks like following:
- * u32 - size
- * u32 - version
- * ... - data
- * u32 - crc32
- */
-
-#include <config.h>
-#include "crcek.h"
-
-/**
- * do_crc32 - calculate CRC32 of given buffer
- * r0 - crc
- * r1 - pointer to buffer
- * r2 - buffer len
- */
- .macro do_crc32
- ldr r5, FFFFFFFF
- eor r0, r0, r5
- adr r3, CRC32_TABLE
-1:
- ldrb r4, [r1], #1
- eor r4, r4, r0
- and r4, r4, #0xff
- ldr r4, [r3, r4, lsl#2]
- eor r0, r4, r0, lsr#8
- subs r2, r2, #0x1
- bne 1b
- eor r0, r0, r5
- .endm
-
- .macro crcuj, offset, size
- mov r0, #0
- ldr r1, \offset
- ldr r2, [r1], #4
- cmp r2, r0 @ no data, no problem
- beq 2f
- tst r2, #3 @ unaligned size
- bne 2f
- ldr r3, \size
- cmp r2, r3 @ bogus size
- bhi 2f
- do_crc32
- ldr r1, [r1]
-2:
- cmp r0, r1
- .endm
-
- .macro wait, reg
- mov \reg, #0x100000
-3:
- subs \reg, \reg, #0x1
- bne 3b
- .endm
-
-.text
-.globl crcek
-crcek:
- /* Enable I-cache */
- mrc p15, 0, r1, c0, c0, 0 @ read C15 ID register
- mrc p15, 0, r1, c0, c0, 1 @ read C15 Cache information register
- mrc p15, 0, r1, c1, c0, 0 @ read C15 Control register
- orr r1, r1, #0x1000 @ enable I-cache, map interrupt vector 0xffff0000
- mcr p15, 0, r1, c1, c0, 0 @ write C15 Control register
- mov r1, #0x00
- mcr p15, 0, r1, c7, c5, 0 @ Flush I-cache
- nop
- nop
- nop
- nop
-
- /* Setup clocking mode */
- ldr r0, MPU_CLKM_BASE @ base of CLOCK unit
- ldrh r1, [r0, #0x18] @ ARM_SYST - get reset status
- bic r1, r1, #(7 << 11) @ clear clock select
- orr r1, r1, #(2 << 11) @ set synchronous scalable
- mov r2, #0
-loop:
- cmp r2, #1 @ this loop will wait for at least 100 cycles
- streqh r1, [r0, #0x18] @ before issuing next request from MPU
- add r2, r2, #1 @ on the 1st run code is loaded into I-cache
- cmp r2, #16 @ and second run will set clocking mode
- bne loop
- nop
-
- /* Setup clock dividers */
- ldr r1, CKCTL_VAL
- orr r1, r1, #0x2000 @ enable DSP clock
- strh r1, [r0] @ setup clock divisors
-
- /* Setup DPLL to generate requested freq */
- ldr r0, DPLL1_BASE @ base of DPLL1 register
- mov r1, #0x0010 @ set PLL_ENABLE
- orr r1, r1, #0x2000 @ set IOB to new locking
- orr r1, r1, #(OMAP5910_DPLL_MUL << 7) @ setup multiplier CLKREF
- orr r1, r1, #(OMAP5910_DPLL_DIV << 5) @ setup divider CLKREF
- strh r1, [r0] @ write
-
-locking:
- ldrh r1, [r0] @ get DPLL value
- tst r1, #0x01
- beq locking @ while LOCK not set
-
- /* Enable clock */
- ldr r0, MPU_CLKM_BASE @ base of CLOCK unit
- mov r1, #(1 << 10) @ disable idle mode do not check
- @ nWAKEUP pin, other remain active
- strh r1, [r0, #0x04]
- ldr r1, EN_CLK_VAL
- strh r1, [r0, #0x08]
- mov r1, #0x003f @ FLASH.RP not enabled in idle and
- strh r1, [r0, #0x0c] @ max delayed ( 32 x CLKIN )
-
-
- mov r6, #0
- crcuj _LOADER1_OFFSET, _LOADER_SIZE
- bne crc1_bad
- orr r6, r6, #1
-crc1_bad:
- crcuj _LOADER2_OFFSET, _LOADER_SIZE
- bne crc2_bad
- orr r6, r6, #2
-crc2_bad:
- ldr r3, _LOADER1_OFFSET
- ldr r4, _LOADER2_OFFSET
- teq r6, #3
- bne one_is_bad @ one of them (or both) has bad crc
- ldr r1, [r3, #4]
- ldr r2, [r4, #4]
- cmp r1, r2 @ boot 2nd loader if versions differ
- beq boot_1st
- b boot_2nd
-one_is_bad:
- tst r6, #1
- bne boot_1st
- tst r6, #2
- bne boot_2nd
-@ We are doomed, so let user know.
-hell:
- ldr r0, GPIO_BASE @ configure GPIO pins
- ldr r1, GPIO_DIRECTION
- strh r1, [r0, #0x08]
-blink_loop:
- mov r1, #0x08
- strh r1, [r0, #0x04]
- wait r3
- mov r1, #0x10
- strh r1, [r0, #0x04]
- wait r3
- b blink_loop
-boot_1st:
- add pc, r3, #8
-boot_2nd:
- add pc, r4, #8
-
-_LOADER_SIZE:
- .word LOADER_SIZE - 8 @ minus size and crc32
-_LOADER1_OFFSET:
- .word LOADER1_OFFSET
-_LOADER2_OFFSET:
- .word LOADER2_OFFSET
-
-FFFFFFFF:
- .word 0xffffffff
-CRC32_TABLE:
- .word 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419
- .word 0x706af48f, 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4
- .word 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07
- .word 0x90bf1d91, 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de
- .word 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, 0x136c9856
- .word 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9
- .word 0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4
- .word 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b
- .word 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3
- .word 0x45df5c75, 0xdcd60dcf, 0xabd13d59, 0x26d930ac, 0x51de003a
- .word 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599
- .word 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924
- .word 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190
- .word 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f
- .word 0x9fbfe4a5, 0xe8b8d433, 0x7807c9a2, 0x0f00f934, 0x9609a88e
- .word 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01
- .word 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed
- .word 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950
- .word 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3
- .word 0xfbd44c65, 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2
- .word 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a
- .word 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5
- .word 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa, 0xbe0b1010
- .word 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f
- .word 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17
- .word 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6
- .word 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615
- .word 0x73dc1683, 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8
- .word 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, 0xf00f9344
- .word 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb
- .word 0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a
- .word 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5
- .word 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1
- .word 0xa6bc5767, 0x3fb506dd, 0x48b2364b, 0xd80d2bda, 0xaf0a1b4c
- .word 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef
- .word 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236
- .word 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe
- .word 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31
- .word 0x2cd99e8b, 0x5bdeae1d, 0x9b64c2b0, 0xec63f226, 0x756aa39c
- .word 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713
- .word 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b
- .word 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242
- .word 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1
- .word 0x18b74777, 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c
- .word 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, 0xa00ae278
- .word 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7
- .word 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc, 0x40df0b66
- .word 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9
- .word 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605
- .word 0xcdd70693, 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8
- .word 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b
- .word 0x2d02ef8d
-
-GPIO_BASE:
- .word 0xfffce000
-MPU_CLKM_BASE:
- .word 0xfffece00
-DPLL1_BASE:
- .word 0xfffecf00
-
-CKCTL_VAL:
- .word OMAP5910_ARM_CKCTL
-EN_CLK_VAL:
- .word OMAP5910_ARM_EN_CLK
-GPIO_DIRECTION:
- .word 0x0000ffe7
-
-.end
+++ /dev/null
-#define LOADER_SIZE (448 * 1024)
-#define LOADER1_OFFSET (128 * 1024)
-#define LOADER2_OFFSET (LOADER1_OFFSET + LOADER_SIZE)
+++ /dev/null
-/*
- * (C) Copyright 2005
- * 2N Telekomunikace, Ladislav Michl <michl@2n.cz>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <stdint.h>
-#include <fcntl.h>
-#include <string.h>
-#include <unistd.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include "crcek.h"
-
-extern uint32_t crc32(uint32_t, const unsigned char *, uint);
-
-static uint32_t data[LOADER_SIZE/4 + 3];
-
-static int do_crc(char *path, unsigned version)
-{
- uint32_t *p;
- ssize_t size;
- int fd;
-
- fd = open(path, O_RDONLY);
- if (fd == -1) {
- perror("Error opening file");
- return EXIT_FAILURE;
- }
- p = data + 2;
- size = read(fd, p, LOADER_SIZE + 4);
- if (size == -1) {
- perror("Error reading file");
- return EXIT_FAILURE;
- }
- if (size > LOADER_SIZE) {
- fprintf(stderr, "File too large\n");
- return EXIT_FAILURE;
- }
- size = (size + 3) & ~3; /* round up to 4 bytes */
- size += 4; /* add size of version field */
- data[0] = size;
- data[1] = version;
- data[size/4 + 1] = crc32(0, (unsigned char *)(data + 1), size);
- close(fd);
-
- if (write(STDOUT_FILENO, data, size + 4 /*size*/ + 4 /*crc*/) == -1) {
- perror("Error writing file");
- return EXIT_FAILURE;
- }
-
- return EXIT_SUCCESS;
-}
-
-int main(int argc, char * const *argv)
-{
- if (argc == 2) {
- return do_crc(argv[1], 0);
- } else if ((argc == 4) && (strcmp(argv[1], "-v") == 0)) {
- char *endptr, *nptr = argv[2];
- unsigned ver = strtoul(nptr, &endptr, 0);
- if (*nptr != '\0' && *endptr == '\0')
- return do_crc(argv[3], ver);
- }
- fprintf(stderr, "Usage: crcit [-v version] <image>\n");
-
- return EXIT_FAILURE;
-}
+++ /dev/null
-/*
- * (C) Copyright 2005
- * Ladislav Michl, 2N Telekomunikace, michl@2n.cz
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Some code shamelessly stolen back from Robin Getz.
- */
-
-#include <common.h>
-#include <exports.h>
-#include <timestamp.h>
-#include <net.h>
-#include "../drivers/net/smc91111.h"
-
-static struct eth_device dev = {
- .iobase = CONFIG_SMC91111_BASE
-};
-
-static u16 read_eeprom_reg(u16 reg)
-{
- int timeout;
-
- SMC_SELECT_BANK(&dev, 2);
- SMC_outw(&dev, reg, PTR_REG);
-
- SMC_SELECT_BANK(&dev, 1);
- SMC_outw(&dev, SMC_inw(&dev, CTL_REG) | CTL_EEPROM_SELECT |
- CTL_RELOAD, CTL_REG);
-
- timeout = 100;
-
- while ((SMC_inw(&dev, CTL_REG) & CTL_RELOAD) && --timeout)
- udelay(100);
- if (timeout == 0) {
- printf("Timeout reading register %02x\n", reg);
- return 0;
- }
-
- return SMC_inw(&dev, GP_REG);
-}
-
-static int write_eeprom_reg(u16 value, u16 reg)
-{
- int timeout;
-
- SMC_SELECT_BANK(&dev, 2);
- SMC_outw(&dev, reg, PTR_REG);
-
- SMC_SELECT_BANK(&dev, 1);
-
- SMC_outw(&dev, value, GP_REG);
- SMC_outw(&dev, SMC_inw(&dev, CTL_REG) | CTL_EEPROM_SELECT |
- CTL_STORE, CTL_REG);
-
- timeout = 100;
-
- while ((SMC_inw(&dev, CTL_REG) & CTL_STORE) && --timeout)
- udelay(100);
- if (timeout == 0) {
- printf("Timeout writing register %02x\n", reg);
- return 0;
- }
-
- return 1;
-}
-
-static int write_data(u16 *buf, int len)
-{
- u16 reg = 0x23;
-
- while (len--)
- write_eeprom_reg(*buf++, reg++);
-
- return 0;
-}
-
-static int verify_macaddr(char *s)
-{
- u16 reg;
- int i, err = 0;
-
- puts("HWaddr: ");
- for (i = 0; i < 3; i++) {
- reg = read_eeprom_reg(0x20 + i);
- printf("%02x:%02x%c", reg & 0xff, reg >> 8, i != 2 ? ':' : '\n');
- if (s)
- err |= reg != ((u16 *)s)[i];
- }
-
- return err ? 0 : 1;
-}
-
-static int set_mac(char *s)
-{
- int i;
- char *e, eaddr[6];
-
- /* turn string into mac value */
- for (i = 0; i < 6; i++) {
- eaddr[i] = simple_strtoul(s, &e, 16);
- s = (*e) ? e+1 : e;
- }
-
- for (i = 0; i < 3; i++)
- write_eeprom_reg(*(((u16 *)eaddr) + i), 0x20 + i);
-
- return 0;
-}
-
-static int parse_element(char *s, unsigned char *buf, int len)
-{
- int cnt;
- char *p, num[3];
- unsigned char id;
-
- id = simple_strtoul(s, &p, 16);
- if (*p++ != ':')
- return -1;
- cnt = 2;
- num[2] = 0;
- for (; *p; p += 2) {
- if (p[1] == 0)
- return -2;
- if (cnt + 3 > len)
- return -3;
- num[0] = p[0];
- num[1] = p[1];
- buf[cnt++] = simple_strtoul(num, NULL, 16);
- }
- buf[0] = id;
- buf[1] = cnt - 2;
-
- return cnt;
-}
-
-int eeprom(int argc, char * const argv[])
-{
- int i, len, ret;
- unsigned char buf[58], *p;
-
- app_startup(argv);
- i = get_version();
- if (i != XF_VERSION) {
- printf("Using ABI version %d, but U-Boot provides %d\n",
- XF_VERSION, i);
- return 1;
- }
-
- if ((SMC_inw(&dev, BANK_SELECT) & 0xFF00) != 0x3300) {
- puts("SMSC91111 not found\n");
- return 2;
- }
-
- /* Called without parameters - print MAC address */
- if (argc < 2) {
- verify_macaddr(NULL);
- return 0;
- }
-
- /* Print help message */
- if (argv[1][1] == 'h') {
- puts("NetStar EEPROM writer\n"
- "Built: " U_BOOT_DATE " at " U_BOOT_TIME "\n"
- "Usage:\n\t<mac_address> [<element_1>] [<...>]\n");
- return 0;
- }
-
- /* Try to parse information elements */
- len = sizeof(buf);
- p = buf;
- for (i = 2; i < argc; i++) {
- ret = parse_element(argv[i], p, len);
- switch (ret) {
- case -1:
- printf("Element %d: malformed\n", i - 1);
- return 3;
- case -2:
- printf("Element %d: odd character count\n", i - 1);
- return 3;
- case -3:
- puts("Out of EEPROM memory\n");
- return 3;
- default:
- p += ret;
- len -= ret;
- }
- }
-
- /* First argument (MAC) is mandatory */
- set_mac(argv[1]);
- if (verify_macaddr(argv[1])) {
- puts("*** HWaddr does not match! ***\n");
- return 4;
- }
-
- while (len--)
- *p++ = 0;
-
- write_data((u16 *)buf, sizeof(buf) >> 1);
-
- return 0;
-}
+++ /dev/null
-/*
- * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <i2c.h>
-#include <flash.h>
-#include <nand.h>
-
-#include <asm/io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_init(void)
-{
- /* arch number of NetStar board */
- gd->bd->bi_arch_number = MACH_TYPE_NETSTAR;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x10000100;
-
- return 0;
-}
-
-int dram_init(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- /* Take the Ethernet controller out of reset and wait
- * for the EEPROM load to complete. */
- *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) |= 0x80;
- udelay(10); /* doesn't work before timer_init call */
- *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) &= ~0x80;
- udelay(500);
-
- return 0;
-}
-
-int misc_init_r(void)
-{
-#if defined(CONFIG_RTC_DS1307)
- /* enable trickle charge */
- i2c_reg_write(CONFIG_SYS_I2C_RTC_ADDR, 0x10, 0xaa);
-#endif
- return 0;
-}
-
-int board_late_init(void)
-{
- return 0;
-}
-
-#if defined(CONFIG_CMD_FLASH)
-ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t * info)
-{
- if (banknum == 0) { /* AM29LV800 boot flash */
- info->portwidth = FLASH_CFI_16BIT;
- info->chipwidth = FLASH_CFI_BY16;
- info->interface = FLASH_CFI_X16;
- return 1;
- }
-
- return 0;
-}
-#endif
-
-#if defined(CONFIG_CMD_NAND)
-/*
- * hardware specific access to control-lines
- *
- * NAND_NCE: bit 0 - don't care
- * NAND_CLE: bit 1 -> bit 1 (0x0002)
- * NAND_ALE: bit 2 -> bit 2 (0x0004)
- */
-static void netstar_nand_hwcontrol(struct mtd_info *mtd, int cmd,
- unsigned int ctrl)
-{
- struct nand_chip *chip = mtd->priv;
- unsigned long mask;
-
- if (cmd == NAND_CMD_NONE)
- return;
-
- mask = (ctrl & NAND_CLE) ? 0x02 : 0;
- if (ctrl & NAND_ALE)
- mask |= 0x04;
- writeb(cmd, (unsigned long)chip->IO_ADDR_W | mask);
-}
-
-int board_nand_init(struct nand_chip *nand)
-{
- nand->options = NAND_SAMSUNG_LP_OPTIONS;
- nand->ecc.mode = NAND_ECC_SOFT;
- nand->cmd_ctrl = netstar_nand_hwcontrol;
- nand->chip_delay = 400;
- return 0;
-}
-#endif
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_SMC91111
- rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
-#endif
- return rc;
-}
-#endif
+++ /dev/null
-/*
- * Board specific setup info
- *
- * (C) Copyright 2004 Ales Jindra <jindra@2n.cz>
- * (C) Copyright 2005 Ladislav Michl <michl@2n.cz>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-
-_TEXT_BASE:
- .word CONFIG_SYS_TEXT_BASE /* SDRAM load addr from config.mk */
-
-OMAP5910_LPG1_BASE: .word 0xfffbd000
-OMAP5910_TIPB_SWITCHES_BASE: .word 0xfffbc800
-OMAP5910_MPU_TC_BASE: .word 0xfffecc00
-OMAP5910_MPU_CLKM_BASE: .word 0xfffece00
-OMAP5910_ULPD_PWR_MNG_BASE: .word 0xfffe0800
-OMAP5910_DPLL1_BASE: .word 0xfffecf00
-OMAP5910_GPIO_BASE: .word 0xfffce000
-OMAP5910_MPU_WD_TIMER_BASE: .word 0xfffec800
-OMAP5910_MPUI_BASE: .word 0xfffec900
-
-_OMAP5910_ARM_CKCTL: .word OMAP5910_ARM_CKCTL
-_OMAP5910_ARM_EN_CLK: .word OMAP5910_ARM_EN_CLK
-
-OMAP5910_MPUI_CTRL: .word 0x0000ff1b
-
-VAL_EMIFS_CS0_CONFIG: .word 0x00009090
-VAL_EMIFS_CS1_CONFIG: .word 0x00003031
-VAL_EMIFS_CS2_CONFIG: .word 0x0000a0a1
-VAL_EMIFS_CS3_CONFIG: .word 0x0000c0c0
-VAL_EMIFS_DYN_WAIT: .word 0x00000000
-/* autorefresh counter 0x246 ((64000000/13.4)-400)/8192) */
- /* SLRF SD_RET ARE SDRAM_TYPE ARCV SDRAM_FREQUENCY PWD CLK */
-
-#if (PHYS_SDRAM_1_SIZE == SZ_32M)
-VAL_EMIFF_SDRAM_CONFIG: .word ((0 << 0) | (0 << 1) | (3 << 2) | (0xf << 4) | (0x246 << 8) | (0 << 24) | (0 << 26) | (0 << 27))
-#else
-VAL_EMIFF_SDRAM_CONFIG: .word ((0 << 0) | (0 << 1) | (3 << 2) | (0xd << 4) | (0x246 << 8) | (0 << 24) | (0 << 26) | (0 << 27))
-#endif
-
-VAL_EMIFF_SDRAM_CONFIG2: .word 0x00000003
-VAL_EMIFF_MRS: .word 0x00000037
-
-/*
- * GPIO04 - Green LED (Red LED is connected to LED Pulse Generator)
- * GPIO07 - LAN91C111 reset
- */
-GPIO_DIRECTION:
- .word 0x0000ff6f
-/*
- * Disable everything (green LED is connected via invertor)
- */
-GPIO_OUTPUT:
- .word 0x00000010
-
-MUX_CONFIG_BASE:
- .word 0xfffe1000
-
-MUX_CONFIG_VALUES:
- .align 4
- .word 0x00000000 @ FUNC_MUX_CTRL_0
- .word 0x00000000 @ FUNC_MUX_CTRL_1
- .word 0x00000000 @ FUNC_MUX_CTRL_2
- .word 0x00000000 @ FUNC_MUX_CTRL_3
- .word 0x00000000 @ FUNC_MUX_CTRL_4
- .word 0x02080480 @ FUNC_MUX_CTRL_5
- .word 0x0100001c @ FUNC_MUX_CTRL_6
- .word 0x0004800b @ FUNC_MUX_CTRL_7
- .word 0x10001200 @ FUNC_MUX_CTRL_8
- .word 0x01201012 @ FUNC_MUX_CTRL_9
- .word 0x02082248 @ FUNC_MUX_CTRL_A
- .word 0x00000248 @ FUNC_MUX_CTRL_B
- .word 0x12240000 @ FUNC_MUX_CTRL_C
- .word 0x00002000 @ FUNC_MUX_CTRL_D
- .word 0x00000000 @ PULL_DWN_CTRL_0
- .word 0x00000800 @ PULL_DWN_CTRL_1
- .word 0x01801000 @ PULL_DWN_CTRL_2
- .word 0x00000000 @ PULL_DWN_CTRL_3
- .word 0x00000000 @ GATE_INH_CTRL_0
- .word 0x00000000 @ VOLTAGE_CTRL_0
- .word 0x00000000 @ TEST_DBG_CTRL_0
- .word 0x00000006 @ MOD_CONF_CTRL_0
- .word 0x0000eaef @ COMP_MODE_CTRL_0
-
-MUX_CONFIG_OFFSETS:
- .align 1
- .byte 0x00 @ FUNC_MUX_CTRL_0
- .byte 0x04 @ FUNC_MUX_CTRL_1
- .byte 0x08 @ FUNC_MUX_CTRL_2
- .byte 0x10 @ FUNC_MUX_CTRL_3
- .byte 0x14 @ FUNC_MUX_CTRL_4
- .byte 0x18 @ FUNC_MUX_CTRL_5
- .byte 0x1c @ FUNC_MUX_CTRL_6
- .byte 0x20 @ FUNC_MUX_CTRL_7
- .byte 0x24 @ FUNC_MUX_CTRL_8
- .byte 0x28 @ FUNC_MUX_CTRL_9
- .byte 0x2c @ FUNC_MUX_CTRL_A
- .byte 0x30 @ FUNC_MUX_CTRL_B
- .byte 0x34 @ FUNC_MUX_CTRL_C
- .byte 0x38 @ FUNC_MUX_CTRL_D
- .byte 0x40 @ PULL_DWN_CTRL_0
- .byte 0x44 @ PULL_DWN_CTRL_1
- .byte 0x48 @ PULL_DWN_CTRL_2
- .byte 0x4c @ PULL_DWN_CTRL_3
- .byte 0x50 @ GATE_INH_CTRL_0
- .byte 0x60 @ VOLTAGE_CTRL_0
- .byte 0x70 @ TEST_DBG_CTRL_0
- .byte 0x80 @ MOD_CONF_CTRL_0
- .byte 0x0c @ COMP_MODE_CTRL_0
- .byte 0xff
-
-.globl lowlevel_init
-lowlevel_init:
- /* Improve performance a bit... */
- mrc p15, 0, r1, c0, c0, 0 @ read C15 ID register
- mrc p15, 0, r1, c0, c0, 1 @ read C15 Cache information register
- mrc p15, 0, r1, c1, c0, 0 @ read C15 Control register
- orr r1, r1, #0x1000 @ enable I-cache, map interrupt vector 0xffff0000
- mcr p15, 0, r1, c1, c0, 0 @ write C15 Control register
- mov r1, #0x00
- mcr p15, 0, r1, c7, c5, 0 @ Flush I-cache
- nop
- nop
- nop
- nop
-
- /* Setup clocking mode */
- ldr r0, OMAP5910_MPU_CLKM_BASE @ base of CLOCK unit
- ldrh r1, [r0, #0x18] @ ARM_SYST - get reset status
- bic r1, r1, #(7 << 11) @ clear clock select
- orr r1, r1, #(2 << 11) @ set synchronous scalable
- mov r2, #0
-loop:
- cmp r2, #1 @ this loop will wait for at least 100 cycles
- streqh r1, [r0, #0x18] @ before issuing next request from MPU
- add r2, r2, #1 @ on the 1st run code is loaded into I-cache
- cmp r2, #16 @ and second run will set clocking mode
- bne loop
- nop
-
- /* Setup clock dividers */
- ldr r1, _OMAP5910_ARM_CKCTL
- orr r1, r1, #0x2000 @ enable DSP clock
- strh r1, [r0] @ setup clock divisors
-
- /* Setup DPLL to generate requested freq */
- ldr r0, OMAP5910_DPLL1_BASE @ base of DPLL1 register
- mov r1, #0x0010 @ set PLL_ENABLE
- orr r1, r1, #0x2000 @ set IOB to new locking
- orr r1, r1, #(OMAP5910_DPLL_MUL << 7) @ setup multiplier CLKREF
- orr r1, r1, #(OMAP5910_DPLL_DIV << 5) @ setup divider CLKREF
- strh r1, [r0] @ write
-
-locking:
- ldrh r1, [r0] @ get DPLL value
- tst r1, #0x01
- beq locking @ while LOCK not set
-
- /* Enable clock */
- ldr r0, OMAP5910_MPU_CLKM_BASE @ base of CLOCK unit
- mov r1, #(1 << 10) @ disable idle mode do not check
- @ nWAKEUP pin, other remain active
- strh r1, [r0, #0x04]
- ldr r1, _OMAP5910_ARM_EN_CLK
- strh r1, [r0, #0x08]
- mov r1, #0x003f @ FLASH.RP not enabled in idle and
- strh r1, [r0, #0x0c] @ max delayed ( 32 x CLKIN )
-
- /* Configure 5910 pins functions to match our board. */
- ldr r0, MUX_CONFIG_BASE
- adr r1, MUX_CONFIG_VALUES
- adr r2, MUX_CONFIG_OFFSETS
-next_mux_cfg:
- ldrb r3, [r2], #1
- ldr r4, [r1], #4
- cmp r3, #0xff
- strne r4, [r0, r3]
- bne next_mux_cfg
-
- /* Configure GPIO pins (also disables Green LED) */
- ldr r0, OMAP5910_GPIO_BASE
- ldr r1, GPIO_OUTPUT
- strh r1, [r0, #0x04]
- ldr r1, GPIO_DIRECTION
- strh r1, [r0, #0x08]
-
- /* EnablePeripherals */
- ldr r0, OMAP5910_MPU_CLKM_BASE @ CLOCK unit
- mov r1, #0x0001 @ Peripheral enable
- strh r1, [r0, #0x14]
-
- /* Program LED Pulse Generator */
- ldr r0, OMAP5910_LPG1_BASE @ 1st LED Pulse Generator
- mov r1, #0x7F @ Set obscure frequency in
- strb r1, [r0, #0x00] @ LCR
- mov r1, #0x01 @ Enable clock (CLK_EN) in
- strb r1, [r0, #0x04] @ PMR
-
- /* TIPB Lock UART1 */
- ldr r0, OMAP5910_TIPB_SWITCHES_BASE @ prepare base of TIPB switches
- mov r1, #1 @ ARM allocated
- strh r1, [r0,#0x04] @ clear IRQ line and status bits
- strh r1, [r0,#0x00]
- ldrh r1, [r0,#0x04]
-
- /* Disable watchdog */
- ldr r0, OMAP5910_MPU_WD_TIMER_BASE
- mov r1, #0xf5
- strh r1, [r0, #0x8]
- mov r1, #0xa0
- strh r1, [r0, #0x8]
-
- /* Enable MCLK */
- ldr r0, OMAP5910_ULPD_PWR_MNG_BASE
- mov r1, #0x6
- strh r1, [r0, #0x34]
- strh r1, [r0, #0x34]
-
- /* Setup clock divisors */
- ldr r0, OMAP5910_ULPD_PWR_MNG_BASE @ base of ULDPL DPLL1 register
-
- mov r1, #0x0010 @ set PLL_ENABLE
- orr r1, r1, #0x2000 @ set IOB to new locking
- strh r1, [r0] @ write
-
-ulocking:
- ldrh r1, [r0] @ get DPLL value
- tst r1, #1
- beq ulocking @ while LOCK not set
-
- /* EMIF init */
- ldr r0, OMAP5910_MPU_TC_BASE
- ldrh r1, [r0, #0x0c] @ EMIFS_CONFIG_REG
- bic r1, r1, #0x0c @ pwr down disabled, flash WP
- orr r1, r1, #0x01
- str r1, [r0, #0x0c]
-
- ldr r1, VAL_EMIFS_CS0_CONFIG
- str r1, [r0, #0x10] @ EMIFS_CS0_CONFIG
- ldr r1, VAL_EMIFS_CS1_CONFIG
- str r1, [r0, #0x14] @ EMIFS_CS1_CONFIG
- ldr r1, VAL_EMIFS_CS2_CONFIG
- str r1, [r0, #0x18] @ EMIFS_CS2_CONFIG
- ldr r1, VAL_EMIFS_CS3_CONFIG
- str r1, [r0, #0x1c] @ EMIFS_CS3_CONFIG
- ldr r1, VAL_EMIFS_DYN_WAIT
- str r1, [r0, #0x40] @ EMIFS_CFG_DYN_WAIT
-
- /* Setup SDRAM */
- ldr r1, VAL_EMIFF_SDRAM_CONFIG
- str r1, [r0, #0x20] @ EMIFF_SDRAM_CONFIG
- ldr r1, VAL_EMIFF_SDRAM_CONFIG2
- str r1, [r0, #0x3c] @ EMIFF_SDRAM_CONFIG2
- ldr r1, VAL_EMIFF_MRS
- str r1, [r0, #0x24] @ EMIFF_MRS
- /* SDRAM needs 100us to stabilize */
- mov r0, #0x4000
-sdelay:
- subs r0, r0, #0x1
- bne sdelay
-
- /* back to arch calling code */
- mov pc, lr
-.end
VCMA9 arm arm920t vcma9 mpl s3c24x0
smdk2400 arm arm920t - samsung s3c24x0
smdk2410 arm arm920t - samsung s3c24x0
-netstar arm arm925t
voiceblue arm arm925t
omap1510inn arm arm925t - ti
integratorap_cm926ejs arm arm926ejs integrator armltd - integratorap
Board Arch CPU removed Commit last known maintainer/contact
=============================================================================
+netstar arm arm925t - 2011-07-17
mx1fs2 arm arm920t - 2011-07-17
lpd7a404 arm lh7a40x - 2011-07-17
edb9301 arm arm920t - 2011-07-17
+++ /dev/null
-/*
- * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
- *
- * Configuation settings for the TI OMAP NetStar board.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include <configs/omap1510.h>
-
-#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
-#define CONFIG_OMAP 1 /* in a TI OMAP core */
-#define CONFIG_OMAP1510 1 /* which is in a 5910 */
-
-/* Input clock of PLL */
-#define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz */
-#define CONFIG_XTAL_FREQ 12000000 /* 12MHz */
-
-#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
-
-#define CONFIG_MISC_INIT_R /* There is nothing to really init */
-#define BOARD_LATE_INIT /* but we flash the LEDs here */
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
-#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
-#define CONFIG_SYS_CONSOLE_INFO_QUIET
-
-/*
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 1
-#define PHYS_SDRAM_1 0x10000000
-#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
-#define PHYS_FLASH_1 0x00000000
-
-#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
-
-/*
- * Environment settings
- */
-#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR 0x4000
-#define CONFIG_ENV_SIZE (8 * 1024)
-#define CONFIG_ENV_SECT_SIZE (8 * 1024)
-#define CONFIG_ENV_ADDR_REDUND 0x6000
-#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
-#define CONFIG_ENV_OVERWRITE
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
-
-/*
- * The stack size is set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE (1 * 1024 * 1024)
-
-/*
- * Hardware drivers
- */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ)
-#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE
-
-#define CONFIG_NET_MULTI
-#define CONFIG_SMC91111
-#define CONFIG_SMC91111_BASE 0x04000300
-
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_MAX_FLASH_SECT 19
-
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
-#define CONFIG_FLASH_CFI_LEGACY
-#define CONFIG_SYS_FLASH_LEGACY_512Kx16
-
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23)
-#define NAND_ALLOW_ERASE_ALL 1
-
-#define CONFIG_HARD_I2C
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_SLAVE 1
-#define CONFIG_DRIVER_OMAP1510_I2C
-
-#define CONFIG_RTC_DS1307
-#define CONFIG_SYS_I2C_RTC_ADDR 0x68
-
-
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-/*
- * Partitions (mtdparts command line support)
- */
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_MTD_DEVICE
-#define CONFIG_FLASH_CFI_MTD
-#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=gen_nand.0"
-#define MTDPARTS_DEFAULT "mtdparts=" \
- "physmap-flash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \
- "gen_nand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)"
-
-/*
- * Command line configuration
- */
-#define CONFIG_CMD_BDI
-#define CONFIG_CMD_BOOTD
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_SAVEENV
-#define CONFIG_CMD_FLASH
-#define CONFIG_CMD_IMI
-#define CONFIG_CMD_LOADB
-#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_RUN
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-
-#define CONFIG_LOOPW
-
-#define CONFIG_BOOTDELAY 3
-#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
-#define CONFIG_BOOTCOMMAND "run fboot"
-#define CONFIG_PREBOOT "run setup"
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "autostart=yes\0" \
- "ospart=0\0" \
- "setup=setenv bootargs console=ttyS0,$baudrate $mtdparts\0" \
- "setpart=" \
- "if test -n $swapos; then " \
- "setenv swapos; saveenv; " \
- "if test $ospart -eq 0; then " \
- "setenv ospart 1; " \
- "else " \
- "setenv ospart 0; " \
- "fi; " \
- "fi\0" \
- "nfsargs=setenv bootargs $bootargs " \
- "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
- "nfsroot=$rootpath root=/dev/nfs\0" \
- "flashargs=run setpart;setenv bootargs $bootargs " \
- "root=mtd:rootfs$ospart ro " \
- "rootfstype=jffs2\0" \
- "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
- "fboot=run flashargs;nboot kernel$ospart\0" \
- "nboot=bootp;run nfsargs;tftp\0"
-
-#if 0 /* feel free to disable for development */
-#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
-#define CONFIG_AUTOBOOT_PROMPT \
- "\nNetStar PBX - boot in %d secs...\n", bootdelay
-#define CONFIG_AUTOBOOT_DELAY_STR "." /* 1st "password" */
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "# "
-#define CONFIG_SYS_CBSIZE 256
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-#define CONFIG_AUTO_COMPLETE
-
-#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
-#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
- (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
-
-#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x400000)
-
-/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
- * This time is further subdivided by a local divisor.
- */
-#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
-#define CONFIG_SYS_PTV 7
-#define CONFIG_SYS_HZ 1000
-
-#define OMAP5910_DPLL_DIV 1
-#define OMAP5910_DPLL_MUL \
- ((CONFIG_SYS_CLK_FREQ * (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
-
-#define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */
-#define OMAP5910_LCD_DIV 2 /* CKL/4 */
-#define OMAP5910_ARM_DIV 0 /* CKL/1 */
-#define OMAP5910_DSP_DIV 0 /* CKL/1 */
-#define OMAP5910_TC_DIV 1 /* CKL/2 */
-#define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */
-#define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */
-
-#define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b */
-#define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) | \
- (OMAP5910_LCD_DIV << 2) | \
- (OMAP5910_ARM_DIV << 4) | \
- (OMAP5910_DSP_DIV << 6) | \
- (OMAP5910_TC_DIV << 8) | \
- (OMAP5910_DSP_MMU_DIV << 10) | \
- (OMAP5910_ARM_TIM_SEL << 12))
-
-#endif /* __CONFIG_H */
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