powerpc/b4860qds: Add LAW Target ID and Create LAW entry for Maple

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h
index f9cec8ea441a298abe04ed47615e453b392cd328..90b264d35e7292c505cc06a9a08e837639edeb7c 100644 (file)
--- a/arch/powerpc/include/asm/fsl_law.h
+++ b/arch/powerpc/include/asm/fsl_law.h
@@ -70,6 +70,8 @@ enum law_trgt_if {
        LAW_TRGT_IF_DCSR = 0x1d,
        LAW_TRGT_IF_LBC = 0x1f,
        LAW_TRGT_IF_QMAN = 0x3c,
+
+       LAW_TRGT_IF_MAPLE = 0x50,
 };
 #define LAW_TRGT_IF_DDR                LAW_TRGT_IF_DDR_1
 #define LAW_TRGT_IF_IFC                LAW_TRGT_IF_LBC

diff --git a/board/freescale/b4860qds/law.c b/board/freescale/b4860qds/law.c
index abaad7ae07dff4d7ea38ba56bbfac7cb938d498d..b26725b2fcbb088892fa3669fd6b8e7d88934b97 100644 (file)
--- a/board/freescale/b4860qds/law.c
+++ b/board/freescale/b4860qds/law.c
@@ -33,6 +33,9 @@ struct law_entry law_table[] = {
        SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN),
 #endif
        SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
+#ifdef CONFIG_SYS_MAPLE_MEM_PHYS
+       SET_LAW(CONFIG_SYS_MAPLE_MEM_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_MAPLE),
+#endif
 #ifdef CONFIG_SYS_DCSRBAR_PHYS
        /* Limit DCSR to 32M to access NPC Trace Buffer */
        SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),

diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 65f8a2209ea344301f4e70089acf7d3bf04013d5..1c9d08e256420c8fe008a10deccdbace2de857e2 100644 (file)
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -526,6 +526,15 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SF_DEFAULT_SPEED         10000000
 #define CONFIG_SF_DEFAULT_MODE          0
 
+/*
+ * MAPLE
+ */
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_MAPLE_MEM_PHYS      0xFA0000000ull
+#else
+#define CONFIG_SYS_MAPLE_MEM_PHYS      0xA0000000
+#endif
+
 /*
  * General PCI
  * Memory space is mapped 1-1, but I/O space must start from 0.