]> git.sur5r.net Git - u-boot/commitdiff
cfi_flash: Add optional config register write to cfi-detection
authorStefan Roese <sr@denx.de>
Mon, 25 Oct 2010 16:31:48 +0000 (18:31 +0200)
committerStefan Roese <sr@denx.de>
Fri, 17 Dec 2010 08:56:05 +0000 (09:56 +0100)
This patch adds the possibility to (optinally) write to the
flash configuration register. The Intel style CFI chips support
such a register that can be used to configure the operation
mode to a non-default value.

This method will be used by the t3corp board, which needs to
configure the DS617 Xilinx flash for async read mode.

Signed-off-by: Stefan Roese <sr@denx.de>
drivers/mtd/cfi_flash.c
include/mtd/cfi_flash.h

index 785975380771d79754b8e79f5c703a8ff2321c1a..b0068842f1c11c8c8eb25595cccc2b961b92a877 100644 (file)
@@ -74,6 +74,20 @@ flash_info_t flash_info[CFI_MAX_FLASH_BANKS];        /* FLASH chips info */
 #define CONFIG_SYS_FLASH_CFI_WIDTH     FLASH_CFI_8BIT
 #endif
 
+/*
+ * 0xffff is an undefined value for the configuration register. When
+ * this value is returned, the configuration register shall not be
+ * written at all (default mode).
+ */
+static u16 cfi_flash_config_reg(int i)
+{
+#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
+       return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
+#else
+       return 0xffff;
+#endif
+}
+
 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
 #endif
@@ -2033,6 +2047,31 @@ void flash_set_verbose(uint v)
        flash_verbose = v;
 }
 
+static void cfi_flash_set_config_reg(u32 base, u16 val)
+{
+#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
+       /*
+        * Only set this config register if really defined
+        * to a valid value (0xffff is invalid)
+        */
+       if (val == 0xffff)
+               return;
+
+       /*
+        * Set configuration register. Data is "encrypted" in the 16 lower
+        * address bits.
+        */
+       flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
+       flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
+
+       /*
+        * Finally issue reset-command to bring device back to
+        * read-array mode
+        */
+       flash_write16(FLASH_CMD_RESET, (void *)base);
+#endif
+}
+
 /*-----------------------------------------------------------------------
  */
 unsigned long flash_init (void)
@@ -2056,6 +2095,10 @@ unsigned long flash_init (void)
        for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
                flash_info[i].flash_id = FLASH_UNKNOWN;
 
+               /* Optionally write flash configuration register */
+               cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
+                                        cfi_flash_config_reg(i));
+
                if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
                        flash_get_size(cfi_flash_bank_addr(i), i);
                size += flash_info[i].size;
index 2ff00f2fdd877b9339801c4a5051b360b0443e22..3245b443af4e0d5b02bb432337ebb79ae93e9b9f 100644 (file)
@@ -32,6 +32,8 @@
 #define FLASH_CMD_ERASE_CONFIRM                0xD0
 #define FLASH_CMD_WRITE                        0x40
 #define FLASH_CMD_PROTECT              0x60
+#define FLASH_CMD_SETUP                        0x60
+#define FLASH_CMD_SET_CR_CONFIRM       0x03
 #define FLASH_CMD_PROTECT_SET          0x01
 #define FLASH_CMD_PROTECT_CLEAR                0xD0
 #define FLASH_CMD_CLEAR_STATUS         0x50