Move to using device tree control in SPL so that we can use the same driver
code in both SPL and U-Boot proper.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
select CPU_V7
select SUPPORT_SPL
select OF_CONTROL
+ select SPL_OF_CONTROL
select DM
+ select SPL_DM
select DM_SPI
select DM_SPI_FLASH
+ select SPL_SEPARATE_BSS
config ARCH_ZYNQMP
bool "Support Xilinx ZynqMP Platform"
} > .sram
. = ALIGN(4);
+#ifdef CONFIG_SPL_DM
+ .u_boot_list : {
+ KEEP(*(SORT(.u_boot_list_*_driver_*)));
+ KEEP(*(SORT(.u_boot_list_*_uclass_*)));
+ } > .sram
+
+ . = ALIGN(4);
+#endif
. = .;
- __image_copy_end = .;
+ _image_binary_end = .;
_end = .;