]> git.sur5r.net Git - u-boot/commitdiff
x86: Add SPI support to quark/galileo
authorBin Meng <bmeng.cn@gmail.com>
Wed, 4 Feb 2015 08:26:12 +0000 (16:26 +0800)
committerSimon Glass <sjg@chromium.org>
Fri, 6 Feb 2015 19:07:45 +0000 (12:07 -0700)
The Quark SoC contains a legacy SPI controller in the legacy bridge
which is ICH7 compatible. Like Tunnel Creek and BayTrail, the BIOS
control register offset in the ICH SPI driver is wrong for the Quark
SoC too, unprotect_spi_flash() is added to enable the flash write.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/quark/quark.c
arch/x86/dts/galileo.dts
drivers/spi/ich.c

index cf596e45e189bba12f23dd248ebc054e3578da77..0d593d9a867f3848b0660f01cb6f832bb20a7c66 100644 (file)
 #include <asm/arch/msg_port.h>
 #include <asm/arch/quark.h>
 
+/*
+ * TODO:
+ *
+ * This whole routine should be removed until we fully convert the ICH SPI
+ * driver to DM and make use of DT to pass the bios control register offset
+ */
+static void unprotect_spi_flash(void)
+{
+       u32 bc;
+
+       bc = pci_read_config32(QUARK_LEGACY_BRIDGE, 0xd8);
+       bc |= 0x1;      /* unprotect the flash */
+       pci_write_config32(QUARK_LEGACY_BRIDGE, 0xd8, bc);
+}
+
 static void quark_setup_bars(void)
 {
        /* GPIO - D31:F0:R44h */
@@ -74,6 +89,8 @@ int arch_cpu_init(void)
         */
        quark_setup_bars();
 
+       unprotect_spi_flash();
+
        return 0;
 }
 
index 2f60aeb82d4dd6366c1565511edbb6cb089fcd46..66af64abdaa497b81b082c010f541120b5672061 100644 (file)
                bank-name = "B";
        };
 
+       spi {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "intel,ich-spi";
+               spi-flash@0 {
+                       #size-cells = <1>;
+                       #address-cells = <1>;
+                       reg = <0>;
+                       compatible = "winbond,w25q64", "spi-flash";
+                       memory-map = <0xff800000 0x00800000>;
+               };
+       };
+
 };
index da857791e06ee53e18ffd110255c95f21e2f49e1..194e8823028bea30691fa8d45278dc12bd03c699 100644 (file)
@@ -177,7 +177,8 @@ void spi_free_slave(struct spi_slave *slave)
 static int get_ich_version(uint16_t device_id)
 {
        if (device_id == PCI_DEVICE_ID_INTEL_TGP_LPC ||
-           device_id == PCI_DEVICE_ID_INTEL_ITC_LPC)
+           device_id == PCI_DEVICE_ID_INTEL_ITC_LPC ||
+           device_id == PCI_DEVICE_ID_INTEL_QRK_ILB)
                return 7;
 
        if ((device_id >= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN &&